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3a10757921
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1898 Commits

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Author SHA1 Message Date
gjz010
3a10757921 bump rvm version and modify ffi 2021-05-17 11:04:31 +08:00
gjz010
b7dc9b0fd2 bump rvm version. 2021-05-13 23:19:23 +08:00
gjz010
05303b9c6f bump rvm version and adjust memory size 2021-05-11 12:22:43 +08:00
gjz010
d1aeb13310 Merge branch 'master' of https://github.com/rcore-os/rCore into rvm 2021-05-11 02:24:46 +08:00
gjz010
faec76beff submodule cleanup 2021-05-11 02:23:09 +08:00
gjz010
42e2063728 Makefile and Cargo.toml changes 2021-05-11 02:21:13 +08:00
gjz010
c753f9a1e9 still demand page race fix 2021-05-11 02:10:49 +08:00
gjz010
067dc4e3f5 RISC-V 64 RVM support 2021-05-11 02:10:15 +08:00
gjz010
2d732a48d8 Serial device file for user using 2nd UART. 2021-05-11 02:09:52 +08:00
gjz010
20b1bc534d New virtio serial as well as bugfix for uart16650 2021-05-11 02:09:23 +08:00
gjz010
ceb679726d Early message using SBI for logging & new board rcore_vmm_guest 2021-05-11 02:08:35 +08:00
gjz010
8107d0993c bugfix for race demand-page access. 2021-05-11 02:08:02 +08:00
Chen
6ee637ce73
Merge pull request #78 from universuen/patch-1 
Update x86_64.md
 2021-05-07 21:45:09 +08:00
Arult
166f90ba92
Update x86_64.md 2021-05-07 20:33:07 +08:00
gjz010
3a57221785 Merge branch 'master' of https://github.com/rcore-os/rCore into rvm 2021-05-04 22:43:57 +08:00
gjz010
af71dfaf4b Temporary commit for cleanup. 2021-05-04 20:58:32 +08:00
gjz010
afd85c9379 submodules. 2021-03-07 02:28:03 +08:00
jiegec
f98a482a10 Add sdata to data section 2021-03-06 23:06:59 +08:00
jiegec
e2ba52d3ec Add sbss to bss sections 2021-03-06 22:50:54 +08:00
gjz010
fd8407a339 Recalibrating timer 2021-03-04 19:59:15 +08:00
gjz010
7707a59b7e Merge branch 'riscvsbi2' of github.com:gjz010/rcore_plus into riscvsbi2 2021-03-03 20:03:50 +08:00
gjz010
465d26a7c6 Forcing hart BOOT_HART_ID to initialize everything. 2021-03-03 20:02:30 +08:00
Chen
fe7fd0283a
Merge pull request #72 from gjz010/riscvsbi2 
Migrating to OpenSBI 0.9 with SBI spec 0.2
 2021-03-03 18:39:22 +08:00
Chen
beb166198b
Merge branch 'master' into riscvsbi2 2021-03-03 18:16:50 +08:00
Chen
438b36aee8
Merge pull request #71 from songzhi/master 
Fix peripherals memory mapping
 2021-03-03 18:16:18 +08:00
gjz010
95f0cd5b6c Run cargo fmt. 2021-03-03 14:55:28 +08:00
gjz010
f68cd2486e Migrating to OpenSBI 0.9 with SBI spec 0.2 2021-03-03 14:32:41 +08:00
李冬冬
913788f518
Merge pull request #1 from songzhi/songzhi-patch-1 
Fix peripherals memory mapping
 2021-03-03 10:43:11 +08:00
李冬冬
e97154e2b6
Fix peripherals memory mapping 
Since `PERIPHERALS_START` and `PERIPHERALS_END` hasn't `KERNEL_OFFSET`, there's no need to minus it.
 2021-03-03 10:42:48 +08:00
Chen
1ab076cfe9
Merge pull request #68 from equation314/rvm 
Hypervisor support using RVM
 2020-09-24 00:14:51 +08:00
Yuekai Jia
bc351b1c7f hypervisor: test hypervisor build in CI 2020-09-23 22:49:24 +08:00
Yuekai Jia
7973369b23 hypervisor: bump rcore-user version 2020-09-23 22:40:34 +08:00
Yuekai Jia
180e855ace hypervisor: import RVM 2020-09-20 23:30:28 +08:00
Chen
87e4039dd8
Merge pull request #66 from wfly1998/master 
update rboot; fix problem of sys_poll
 2020-08-25 09:51:10 +08:00
Yukiteru Lee
ec4871278d fix problem of sys_poll 2020-08-25 09:22:33 +08:00
Yukiteru Lee
341451c90b update rboot 2020-08-25 09:22:21 +08:00
Chen
d3ab8c58ad
Merge pull request #63 from rcore-os/fix-mipsel 
Fix mipsel
 2020-07-09 13:14:55 +08:00
Jiajie Chen
c31f76ffa4 Add mipsel back to github actions 2020-07-09 12:51:13 +08:00
Jiajie Chen
e601787ca2 Only yield for timer interrupt 2020-07-09 12:50:06 +08:00
Jiajie Chen
34e53e22b4 Fix mipsel serial 2020-07-09 12:40:50 +08:00
Jiajie Chen
8942bb8eeb Use uart16550 as serial in mipsel as well 2020-07-09 12:36:26 +08:00
刘丰源
6906337068 enable interrupt 2020-07-08 22:07:24 +08:00
Jiajie Chen
b13833e0e9 Implement wait_for_interrupt properly 2020-07-07 20:41:27 +08:00
Jiajie Chen
d0884a9019 Fix rdhwr simulation 2020-07-07 17:38:21 +08:00
Jiajie Chen
968361cc3e Enable cp1 in user mode 2020-07-07 17:31:04 +08:00
Jiajie Chen
85528673f1 Fix typo 2020-07-07 17:28:54 +08:00
Jiajie Chen
c170eb0414 Fix timer interrupt 2020-07-07 17:12:07 +08:00
Jiajie Chen
e554754e79 Fix mipsel syscall handling 2020-07-07 16:57:37 +08:00
Jiajie Chen
6a3a85ca5a Fix mipsel page fault handling 2020-07-07 15:49:55 +08:00
Jiajie Chen
4dd72365ca Fix mipsel context switch 2020-07-07 10:00:24 +08:00