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Author SHA1 Message Date
Jiajie Chen
cd2a2e23bb Fix addr2line for new format 2019-04-17 00:26:30 +08:00
chyyuu
594cc3e16f fix bugs about cpu num config (x86-64) 
TODO:
Unfixed bugs: rcore can not identify the hyperthread-mode cpus(i9-9900k) and dead.
 2019-04-16 18:13:55 +08:00
WangRunji
f2467dad6a add maintainers to README 2019-04-16 13:11:29 +08:00
Jiajie Chen
9d84684570 Remove wrongly commited u-boot.bin 2019-04-16 10:09:25 +08:00
Jiajie Chen
9aa24ccacb Merge branch 'dev' 2019-04-16 10:08:27 +08:00
Jiajie Chen
8115256162 Check exec args 2019-04-16 10:05:42 +08:00
Yuhao Zhou
189c4aa5c6 Support sys_pipe for MIPS. 2019-04-16 02:42:44 +08:00
Yuhao Zhou
f5fe3ce4f3 Move userstack to 0x60000000. 2019-04-16 02:10:36 +08:00
Yuhao Zhou
9532311c1e Copy TLS data in sys_fork. 2019-04-16 01:31:00 +08:00
chyyuu
6f5faf422d add Makefile info about creating disk.img for real pc with x86_64 cpu 2019-04-16 00:11:35 +08:00
WangRunji
f88cffb8ab fix bitvec version 2019-04-15 22:08:20 +08:00
Yuhao Zhou
dc90cb5a8d Fix pgfault, fstat syscall convention. biscuit/ls works! 2019-04-15 18:09:48 +08:00
Yuhao Zhou
9075a172ad Fix iovec size for MIPSn32. 2019-04-15 15:45:09 +08:00
Yuhao Zhou
bfa4c9d47e Support TLS for MIPS. 2019-04-15 14:14:07 +08:00
Wang Runji
1708c4e6d4
Merge pull request #9 from GeminiLab/geminilab 
BUGFIX: fix cd . and .. on cwd
 2019-04-15 13:50:17 +08:00
Yuhao Zhou
657395784d Fix compile errors. 2019-04-15 13:02:06 +08:00
NagiNikaido
de02024b77
Merge pull request #1 from rcore-os/dev 
Dev branch sync.
 2019-04-15 10:52:08 +08:00
NagiNikaido
c3813c4b38 BUGFIX: rewrited sys_chdir(). 2019-04-15 00:41:28 +08:00
WangRunji
3556c758db impl more file system *at syscalls 2019-04-14 15:47:42 +08:00
WangRunji
fe0045c0c9 remove legacy 'is32' code 2019-04-12 19:23:45 +08:00
NagiNikaido
a4221a559c .gitignore updated. 2019-04-12 13:10:34 +08:00
WangRunji
e12074c936 replace gnu binutils with cargo-binutils 2019-04-12 00:23:34 +08:00
Jiajie Chen
358fa09f6d Update README about bootimage version 2019-04-10 13:12:26 +08:00
Yuhao Zhou
d46c10a0a2 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-10 00:40:54 +08:00
Yuhao Zhou
d6ce309247 Fix some review issues. 2019-04-10 00:38:31 +08:00
Jiajie Chen
41dab25f9c Merge remote-tracking branch 'origin/master' into dev 2019-04-09 20:30:30 +08:00
Harry Chen
75ba0859cf Run cargo fmt 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 17:08:04 +08:00
Harry Chen
9b5f7b8078 Use host gcc for preprocessing in makefile 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 17:06:33 +08:00
Harry Chen
801b2e609a Fix makefile for aarch64 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 16:16:09 +08:00
Harry Chen
782da8761d Fix travis config (forget in last commit) 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:51:34 +08:00
Harry Chen
aa9bf593e2 Fix Makefile for aarch64, install dtc in travis config 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:47:04 +08:00
Harry Chen
4fc32572b0 Fix some review problems, add mispel arch to CI 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:31:56 +08:00
Harry Chen
37a69c2a47 Update user repo to latest version, ready for first merge 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 12:34:30 +08:00
Harry Chen
358e682bad Enable PCI initialization for matal, update mips crate and user app repo 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 01:08:49 +08:00
Yuhao Zhou
067d4d1193 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 22:36:15 +08:00
Yuhao Zhou
9078190e28 Fix many bugs. 
* timer counter overflow
* clear TLB when switching context
* fix cp0.ebase access (sel = 1)
* clear TLB when editing page table
 2019-04-08 22:35:02 +08:00
Harry Chen
39a4dd2ff0 Fix VGA driver, now screen lightens on malta! 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 20:53:14 +08:00
Yuhao Zhou
2baf15acac Update kstack switch. 2019-04-08 14:29:27 +08:00
Yuhao Zhou
4a81242552 Fix kstack switch. 2019-04-08 12:50:30 +08:00
Yuhao Zhou
248623096b Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 04:49:22 +08:00
Yuhao Zhou
b6aa9858d3 Fix return register in sys_clone. 2019-04-08 04:47:36 +08:00
Harry Chen
7e3d26ce6b Add debug output for qemu vga driver, still not working... 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:59:42 +08:00
Harry Chen
a57a22a26b Fix VGA initialization with correct PCI address 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:18:31 +08:00
Harry Chen
8754a6eb15 Add PCI initialization in QEMU stdvga 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:03:35 +08:00
Harry Chen
c32b0d6bee Add VGA implementation for mipsel malta board 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 02:06:30 +08:00
Harry Chen
4e72c66087 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 01:45:57 +08:00
Harry Chen
df3eb0e1da Add ColorConfig support to framebuffer driver 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 01:30:25 +08:00
Yuhao Zhou
684a2c5dd8 Fix syscall return register. 2019-04-08 01:00:26 +08:00
Harry Chen
12598a07bf Update to latest user app 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:59:09 +08:00
Harry Chen
706f7e4e9a Fix UART controller for malta, now input works! 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:52:10 +08:00