mirror of
https://github.com/rcore-os/rCore.git
synced 2025-01-18 17:07:04 +04:00
Add IDE back for mips, remove mipssim
This commit is contained in:
Jiajie Chen
parent
100db70184
commit
a16a9e238b
2
kernel/Cargo.lock
generated
2
kernel/Cargo.lock
generated
@ -709,7 +709,7 @@ checksum = "3a385d94f3f62e60445a0adb9ff8d9621faa272234530d4c0f848ec98f88e316"
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[[package]]
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name = "trapframe"
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version = "0.4.3"
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source = "git+https://github.com/rcore-os/trapframe-rs?rev=063a844#063a844654aaf37af2ef2afac305b4b025407441"
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source = "git+https://github.com/rcore-os/trapframe-rs?rev=e58d975#e58d9755f181de24431b5ff9437f396ac71e8429"
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dependencies = [
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"raw-cpuid",
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"x86_64",
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@ -27,8 +27,7 @@ nographic = []
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consolegraphic = []
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board_raspi3 = ["bcm2837"]
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# for qemu machine
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board_malta = ["link_user"]
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board_mipssim = ["link_user"]
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board_malta = []
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# for x86 PC
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board_pc = ["link_user"]
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# Hard link user program
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@ -70,7 +69,7 @@ rcore-fs-devfs = { git = "https://github.com/rcore-os/rcore-fs", rev = "517af47"
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rlibc = "1.0"
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smoltcp = { git = "https://github.com/rcore-os/smoltcp", rev = "5bd87c7c", default-features = false, features = ["alloc", "log", "ethernet", "proto-ipv4", "proto-igmp", "socket-icmp", "socket-udp", "socket-tcp", "socket-raw"] }
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spin = "0.5"
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trapframe = { git = "https://github.com/rcore-os/trapframe-rs", rev = "063a844" }
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trapframe = { git = "https://github.com/rcore-os/trapframe-rs", rev = "e58d975" }
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virtio-drivers = { git = "https://github.com/rcore-os/virtio-drivers", rev = "dfa70e14" }
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volatile = "0.2"
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woke = "0.0.2"
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@ -65,11 +65,6 @@ ifeq ($(ARCH), mipsel)
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DTB := src/arch/$(ARCH)/board/$(BOARD)/device.dtb
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endif
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# mipssim does not support SMP
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ifeq ($(BOARD), mipssim)
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SMP := 1
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endif
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### qemu options ###
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qemu_opts := \
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-smp cores=$(SMP)
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@ -157,15 +152,10 @@ else ifeq ($(ARCH), mipsel)
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ifeq ($(BOARD), malta)
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qemu_opts += \
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-machine $(BOARD) -device VGA \
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-hda $(USER_QCOW2) \
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-serial null -serial null -serial mon:stdio \
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-kernel $(kernel_img)
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endif
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ifeq ($(BOARD), mipssim)
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qemu_opts += \
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-machine $(BOARD) \
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-serial mon:stdio \
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-kernel $(kernel_img)
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endif
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endif
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ifdef D
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@ -302,7 +292,7 @@ ifeq ($(ARCH), $(filter $(ARCH), riscv32 riscv64))
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$(sysroot)/lib/rustlib/src/rust/src/libcore/sync/atomic.rs \
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src/arch/riscv/atomic.patch
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else ifeq ($(ARCH), mipsel)
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@for file in context entry trap ; do \
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@for file in entry ; do \
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$(hostcc) -Dboard_$(BOARD) -E src/arch/$(ARCH)/boot/$${file}.S -o src/arch/$(ARCH)/boot/$${file}.gen.s ; \
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done
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$(hostcc) -Dboard_$(BOARD) -E src/arch/$(ARCH)/boot/linker.ld.S -o src/arch/$(ARCH)/boot/linker.ld
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@ -1,3 +1,3 @@
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/// board specific constants
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pub const MEMORY_END: usize = 0x8400_0000;
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pub const MEMORY_END: usize = 0x8800_0000;
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pub const KERNEL_HEAP_SIZE: usize = 0x0200_0000;
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@ -1,3 +1,4 @@
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use crate::drivers::block::ide;
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use crate::drivers::bus::pci;
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use crate::drivers::gpu::fb::{self, FramebufferInfo};
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use mips::registers::cp0;
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@ -42,4 +43,5 @@ pub fn init_driver() {
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screen_size: 800 * 600,
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};
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fb::init(fb_info);
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ide::init();
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}
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@ -1,3 +0,0 @@
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/// board specific constants
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pub const MEMORY_END: usize = 0x8800_0000;
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pub const KERNEL_HEAP_SIZE: usize = 0x00a0_0000;
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@ -1,36 +0,0 @@
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/dts-v1/;
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/ {
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model = "qemu mipssim";
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compatible = "qemu,mipssim";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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stdio = &uart0;
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};
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aliases { };
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cpu_intc: interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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main_memory: memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x10000000>;
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};
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uart0: serial@bfd003f8 {
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compatible = "ns16550a";
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reg = <0xbfd003f8 0x8>;
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clock-frequency = <1843200>;
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/* attached to the MIPS CPU INT2 pin, ie interrupt 4 */
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interrupt-parent = <&cpu_intc>;
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interrupts = <4>;
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};
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};
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@ -1,18 +0,0 @@
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pub mod consts;
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#[path = "../../../../drivers/serial/uart16550.rs"]
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pub mod serial;
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/// Device tree bytes
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pub static DTB: &'static [u8] = include_bytes!("device.dtb");
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/// Initialize serial port first
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pub fn init_serial_early() {
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serial::init(0xbfd003f8);
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println!("Hello QEMU MIPSSIM!");
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}
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/// Initialize other board drivers
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pub fn init_driver() {
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// TODO: add possibly more drivers
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// timer::init();
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}
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@ -1,67 +0,0 @@
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#include "regdef.h"
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.set noat
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.set noreorder
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.section .text.context
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.globl switch_context
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.extern _root_page_table_ptr
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.extern _cur_kstack_ptr
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.extern _cur_tls
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switch_context:
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// save from's registers
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addi sp, sp, (-4*16)
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sw sp, 0(a0)
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sw ra, 0(sp)
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sw s0, 4*4(sp)
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sw s1, 5*4(sp)
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sw s2, 6*4(sp)
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sw s3, 7*4(sp)
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sw s4, 8*4(sp)
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sw s5, 9*4(sp)
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sw s6, 10*4(sp)
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sw s7, 11*4(sp)
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sw s8, 12*4(sp)
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sw gp, 13*4(sp)
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// sw ra, 12*4(sp)
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// sw sp, 13*4(sp)
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// save page table address
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la s0, _root_page_table_ptr
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lw s1, 0(s0)
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sw s1, 4(sp)
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// save TLS
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la s2, _cur_tls
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lw s1, 0(s2)
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sw s1, 2*4(sp)
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// restore to's registers
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lw sp, 0(a1)
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// restore page table address
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lw s1, 4(sp)
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sw s1, 0(s0)
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// restore TLS
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lw s1, 2*4(sp)
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sw s1, 0(s2)
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mtc0 s1, $4, 2 // cp0.user_local
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lw ra, 0(sp)
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lw s0, 4*4(sp)
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lw s1, 5*4(sp)
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lw s2, 6*4(sp)
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lw s3, 7*4(sp)
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lw s4, 8*4(sp)
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lw s5, 9*4(sp)
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lw s6, 10*4(sp)
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lw s7, 11*4(sp)
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lw s8, 12*4(sp)
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lw gp, 13*4(sp)
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addi sp, sp, (4*16)
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sw zero, 0(a1)
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jr ra
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nop
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@ -38,3 +38,14 @@ bootstack:
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.space 4096 * 16 * 8
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.global bootstacktop
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bootstacktop:
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.align 12 #PGSHIFT
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.global _root_page_table_buffer
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_root_page_table_buffer:
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.space 1024 * 64 # 64KB
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.global _root_page_table_ptr
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_root_page_table_ptr:
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.space 4 # 4bytes
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.global _cur_tls
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_cur_tls:
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.space 4 # 4bytes
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@ -1,199 +0,0 @@
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#include "regdef.h"
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.set noat
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.set noreorder
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.section .text.ebase
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.globl trap_entry
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.org 0x0
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trap_entry:
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# +0x000: TLB-miss vector
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b general_trap_vec
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# +0x180: general vector
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.org 0x180
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general_trap_vec:
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move k1, sp # save stack pointer to k1
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mfc0 k0, $12 # read cp0.status
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andi k0, k0, 0x10 # extract cp0.status.ksu
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beq k0, zero, trap_from_kernel
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nop # delayslot
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trap_from_user:
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# load kstack, we can use k0 to store something
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# la k0, kernel_stack
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# la sp, kernel_stack_top
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la k0, _cur_kstack_ptr
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lw sp, 0(k0)
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trap_from_kernel:
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/*
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* k0 is damaged
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* k1 = old stack pointer
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* sp = kernel stack */
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#define TRAPFRAME_SIZE 176
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# align stack pointer
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andi k0, sp, 0xf
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beqz k0, sp_aligned
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nop
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la k0, 0xfffffff0
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and k0, sp, k0
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sw sp, -TRAPFRAME_SIZE(k0)
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move sp, k0
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sp_aligned:
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# allocate 38 / 70 words for trapframe + 6 extra words
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addiu sp, sp, -TRAPFRAME_SIZE
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# save general registers
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sw ra, 160(sp)
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sw fp, 156(sp)
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sw k1, 152(sp) # k1 = old sp
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sw gp, 148(sp)
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sw k1, 144(sp) # real k1 is damaged
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sw k0, 140(sp) # real k0 is damaged
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sw t9, 136(sp)
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sw t8, 132(sp)
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sw s7, 128(sp)
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sw s6, 124(sp)
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sw s5, 120(sp)
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sw s4, 116(sp)
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sw s3, 112(sp)
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sw s2, 108(sp)
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sw s1, 104(sp)
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sw s0, 100(sp)
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sw t7, 96(sp)
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sw t6, 92(sp)
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sw t5, 88(sp)
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sw t4, 84(sp)
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sw t3, 80(sp)
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sw t2, 76(sp)
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sw t1, 72(sp)
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sw t0, 68(sp)
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sw a3, 64(sp)
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sw a2, 60(sp)
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sw a1, 56(sp)
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sw a0, 52(sp)
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sw v1, 48(sp)
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sw v0, 44(sp)
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sw AT, 40(sp)
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nop
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# save hi/lo
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mflo t1
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sw t1, 36(sp)
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mfhi t0
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sw t0, 32(sp)
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# save special registers
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mfc0 t0, $8 # cp0.vaddr
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sw t0, 28(sp)
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mfc0 t1, $14 # cp0.epc
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sw t1, 24(sp)
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mfc0 t0, $13 # cp0.cause
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sw t0, 20(sp)
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mfc0 t1, $12 # cp0.status
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sw t1, 16(sp)
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# support nested interrupt
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la t0, ~0x1b # reset status.ksu, status.exl, status.ie
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and t1, t1, t0
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mtc0 t1, $12 # cp0.status
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# prepare to call rust_trap
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ori a0, sp, 0 /* set argument (trapframe) */
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jal rust_trap
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nop
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.globl trap_return
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trap_return:
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# restore special registers
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lw t1, 16(sp)
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ori t1, t1, 0x2 # status.exl
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nop
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mtc0 t1, $12 # cp0.status
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lw k0, 24(sp)
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mtc0 k0, $14 # cp0.epc
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lw t0, 32(sp)
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mthi t0
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lw t1, 36(sp)
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mtlo t1
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# restore general registers
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lw AT, 40(sp)
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lw v0, 44(sp)
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lw v1, 48(sp)
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lw a0, 52(sp)
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lw a1, 56(sp)
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lw a2, 60(sp)
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lw a3, 64(sp)
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lw t0, 68(sp)
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lw t1, 72(sp)
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lw t2, 76(sp)
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lw t3, 80(sp)
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lw t4, 84(sp)
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lw t5, 88(sp)
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lw t6, 92(sp)
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lw t7, 96(sp)
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lw s0, 100(sp)
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lw s1, 104(sp)
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lw s2, 108(sp)
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lw s3, 112(sp)
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lw s4, 116(sp)
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lw s5, 120(sp)
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lw s6, 124(sp)
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lw s7, 128(sp)
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lw t8, 132(sp)
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lw t9, 136(sp)
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# lw k0, 140(sp)
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# lw k1, 144(sp)
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lw gp, 148(sp)
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lw fp, 156(sp)
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lw ra, 160(sp)
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# save kernel stack
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lw k0, 0(sp)
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addiu k1, sp, TRAPFRAME_SIZE
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movn k1, k0, k0
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la k0, _cur_kstack_ptr
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sw k1, 0(k0)
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nop
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// restore stack
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lw sp, 152(sp)
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eret
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nop
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.section .bss.stack
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.align 12 #PGSHIFT
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.global kernel_stack
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kernel_stack:
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.space 1024 * 16 # 16KB for kernel stack
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.global kernel_stack_top
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kernel_stack_top:
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.align 12 #PGSHIFT
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.global _root_page_table_buffer
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_root_page_table_buffer:
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.space 1024 * 64 # 64KB
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.global _root_page_table_ptr
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_root_page_table_ptr:
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.space 4 # 4bytes
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.global _cur_kstack_ptr
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_cur_kstack_ptr:
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.space 4 # 4bytes
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.global _cur_tls
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_cur_tls:
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.space 4 # 4bytes
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@ -37,6 +37,7 @@ fn init_frame_allocator() {
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/// Transform memory area `[start, end)` to integer range for `FrameAllocator`
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fn to_range(start: usize, end: usize) -> Range<usize> {
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info!("frame allocator: start {:#x} end {:#x}", start, end);
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let page_start = (start - MEMORY_OFFSET) / PAGE_SIZE;
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let page_end = (end - MEMORY_OFFSET - 1) / PAGE_SIZE + 1;
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assert!(page_start < page_end, "illegal range for frame allocator");
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@ -17,10 +17,6 @@ use mips::registers::cp0;
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#[path = "board/malta/mod.rs"]
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pub mod board;
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#[cfg(feature = "board_mipssim")]
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#[path = "board/mipssim/mod.rs"]
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pub mod board;
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#[no_mangle]
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pub extern "C" fn rust_main() -> ! {
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// unsafe { cpu::set_cpu_id(hartid); }
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@ -70,6 +66,4 @@ fn others_main() -> ! {
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const BOOT_CPU_ID: u32 = 0;
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global_asm!(include_str!("boot/context.gen.s"));
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global_asm!(include_str!("boot/entry.gen.s"));
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global_asm!(include_str!("boot/trap.gen.s"));
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252
kernel/src/drivers/block/ide.rs
Normal file
252
kernel/src/drivers/block/ide.rs
Normal file
@ -0,0 +1,252 @@
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//! ATA IO code, handling device multiplexing and IO operations
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//!
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//! Borrow from Rucore project. Thanks GWord!
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//! Port from ucore C code.
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//! Currently used in MIPS
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use crate::drivers::{block::BlockDriver, DeviceType, Driver};
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use crate::drivers::{BLK_DRIVERS, DRIVERS};
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use crate::sync::SpinNoIrqLock as Mutex;
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use alloc::string::String;
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use alloc::sync::Arc;
|
||||
use core::slice;
|
||||
|
||||
pub const BLOCK_SIZE: usize = 512;
|
||||
|
||||
pub struct IDE {
|
||||
num: u8,
|
||||
/// I/O Base
|
||||
base: u16,
|
||||
/// Control Base
|
||||
ctrl: u16,
|
||||
}
|
||||
|
||||
pub struct IDEDriver(Mutex<IDE>);
|
||||
|
||||
impl Driver for IDEDriver {
|
||||
fn try_handle_interrupt(&self, _irq: Option<usize>) -> bool {
|
||||
false
|
||||
}
|
||||
|
||||
fn device_type(&self) -> DeviceType {
|
||||
DeviceType::Block
|
||||
}
|
||||
|
||||
fn get_id(&self) -> String {
|
||||
format!("ide")
|
||||
}
|
||||
|
||||
fn as_block(&self) -> Option<&dyn BlockDriver> {
|
||||
Some(self)
|
||||
}
|
||||
}
|
||||
|
||||
impl BlockDriver for IDEDriver {
|
||||
fn read_block(&self, block_id: usize, buf: &mut [u8]) -> bool {
|
||||
let mut driver = self.0.lock();
|
||||
let buf = unsafe { slice::from_raw_parts_mut(buf.as_ptr() as *mut u32, BLOCK_SIZE / 4) };
|
||||
driver.read(block_id as u64, 1, buf).is_ok()
|
||||
}
|
||||
|
||||
fn write_block(&self, block_id: usize, buf: &[u8]) -> bool {
|
||||
if buf.len() < BLOCK_SIZE {
|
||||
return false;
|
||||
}
|
||||
let mut driver = self.0.lock();
|
||||
let buf = unsafe { slice::from_raw_parts(buf.as_ptr() as *mut u32, BLOCK_SIZE / 4) };
|
||||
driver.write(block_id as u64, 1, buf).is_ok()
|
||||
}
|
||||
}
|
||||
|
||||
impl IDE {
|
||||
pub fn new(num: u8) -> Self {
|
||||
let ide = match num {
|
||||
0 => IDE {
|
||||
num: 0,
|
||||
base: 0x1f0,
|
||||
ctrl: 0x3f4,
|
||||
},
|
||||
1 => IDE {
|
||||
num: 1,
|
||||
base: 0x1f0,
|
||||
ctrl: 0x3f4,
|
||||
},
|
||||
2 => IDE {
|
||||
num: 2,
|
||||
base: 0x170,
|
||||
ctrl: 0x374,
|
||||
},
|
||||
3 => IDE {
|
||||
num: 3,
|
||||
base: 0x170,
|
||||
ctrl: 0x374,
|
||||
},
|
||||
_ => panic!("ide number should be 0,1,2,3"),
|
||||
};
|
||||
ide.init();
|
||||
ide
|
||||
}
|
||||
|
||||
/// Read ATA DMA. Block size = 512 bytes.
|
||||
pub fn read(&self, sector: u64, count: usize, data: &mut [u32]) -> Result<(), ()> {
|
||||
assert_eq!(data.len(), count * SECTOR_SIZE);
|
||||
self.wait();
|
||||
unsafe {
|
||||
self.select(sector, count as u8);
|
||||
port::outb(self.base + ISA_COMMAND, IDE_CMD_READ);
|
||||
for i in 0..count {
|
||||
let ptr = &mut data[(i as usize) * SECTOR_SIZE];
|
||||
if self.wait_error() {
|
||||
return Err(());
|
||||
}
|
||||
insl(self.base, ptr, SECTOR_SIZE);
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
/// Write ATA DMA. Block size = 512 bytes.
|
||||
pub fn write(&self, sector: u64, count: usize, data: &[u32]) -> Result<(), ()> {
|
||||
assert_eq!(data.len(), count * SECTOR_SIZE);
|
||||
self.wait();
|
||||
unsafe {
|
||||
self.select(sector, count as u8);
|
||||
port::outb(self.base + ISA_COMMAND, IDE_CMD_WRITE);
|
||||
for i in 0..count {
|
||||
let ptr = &data[(i as usize) * SECTOR_SIZE];
|
||||
if self.wait_error() {
|
||||
return Err(());
|
||||
}
|
||||
outsl(self.base, ptr, SECTOR_SIZE);
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn wait(&self) {
|
||||
while unsafe { port::inb(self.base + ISA_STATUS) } & IDE_BUSY != 0 {}
|
||||
}
|
||||
|
||||
fn wait_error(&self) -> bool {
|
||||
self.wait();
|
||||
let status = unsafe { port::inb(self.base + ISA_STATUS) };
|
||||
status & (IDE_DF | IDE_ERR) != 0
|
||||
}
|
||||
|
||||
fn init(&self) {
|
||||
self.wait();
|
||||
unsafe {
|
||||
// step1: select drive
|
||||
port::outb(self.base + ISA_SDH, (0xE0 | ((self.num & 1) << 4)) as u8);
|
||||
self.wait();
|
||||
|
||||
// step2: send ATA identify command
|
||||
port::outb(self.base + ISA_COMMAND, IDE_CMD_IDENTIFY);
|
||||
self.wait();
|
||||
|
||||
// step3: polling
|
||||
if port::inb(self.base + ISA_STATUS) == 0 || self.wait_error() {
|
||||
return;
|
||||
}
|
||||
|
||||
// ???
|
||||
let mut data = [0; SECTOR_SIZE];
|
||||
insl(self.base + ISA_DATA, data.as_mut_ptr(), SECTOR_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
fn select(&self, sector: u64, count: u8) {
|
||||
assert_ne!(count, 0);
|
||||
self.wait();
|
||||
unsafe {
|
||||
// generate interrupt
|
||||
port::outb(self.ctrl + ISA_CTRL, 0);
|
||||
port::outb(self.base + ISA_SECCNT, count);
|
||||
port::outb(self.base + ISA_SECTOR, (sector & 0xFF) as u8);
|
||||
port::outb(self.base + ISA_CYL_LO, ((sector >> 8) & 0xFF) as u8);
|
||||
port::outb(self.base + ISA_CYL_HI, ((sector >> 16) & 0xFF) as u8);
|
||||
port::outb(
|
||||
self.base + ISA_SDH,
|
||||
0xE0 | ((self.num & 1) << 4) | (((sector >> 24) & 0xF) as u8),
|
||||
);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
const SECTOR_SIZE: usize = 128;
|
||||
const MAX_DMA_SECTORS: usize = 0x1F_F000 / SECTOR_SIZE; // Limited by sector count (and PRDT entries)
|
||||
// 512 PDRT entries, assume maximum fragmentation = 512 * 4K max = 2^21 = 2MB per transfer
|
||||
|
||||
const ISA_DATA: u16 = 0x00;
|
||||
const ISA_ERROR: u16 = 0x01;
|
||||
const ISA_PRECOMP: u16 = 0x01;
|
||||
const ISA_CTRL: u16 = 0x02;
|
||||
const ISA_SECCNT: u16 = 0x02;
|
||||
const ISA_SECTOR: u16 = 0x03;
|
||||
const ISA_CYL_LO: u16 = 0x04;
|
||||
const ISA_CYL_HI: u16 = 0x05;
|
||||
const ISA_SDH: u16 = 0x06;
|
||||
const ISA_COMMAND: u16 = 0x07;
|
||||
const ISA_STATUS: u16 = 0x07;
|
||||
|
||||
const IDE_BUSY: u8 = 0x80;
|
||||
const IDE_DRDY: u8 = 0x40;
|
||||
const IDE_DF: u8 = 0x20;
|
||||
const IDE_DRQ: u8 = 0x08;
|
||||
const IDE_ERR: u8 = 0x01;
|
||||
|
||||
const IDE_CMD_READ: u8 = 0x20;
|
||||
const IDE_CMD_WRITE: u8 = 0x30;
|
||||
const IDE_CMD_IDENTIFY: u8 = 0xEC;
|
||||
|
||||
const MAX_NSECS: usize = 128;
|
||||
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
unsafe fn insl(addr: u16, data: *mut u32, len: usize) {
|
||||
llvm_asm!("rep insl" :: "{dx}"(addr), "{rdi}"(data), "{cx}"(SECTOR_SIZE) : "rdi" : "volatile");
|
||||
}
|
||||
|
||||
#[cfg(not(target_arch = "x86_64"))]
|
||||
unsafe fn insl(addr: u16, data: *mut u32, len: usize) {
|
||||
for i in 0..len {
|
||||
*data.add(i) = port::inl(addr);
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
unsafe fn outsl(addr: u16, data: *const u32, len: usize) {
|
||||
llvm_asm!("rep insl" :: "{dx}"(addr), "{rdi}"(data), "{cx}"(SECTOR_SIZE) : "rdi" : "volatile");
|
||||
}
|
||||
|
||||
#[cfg(not(target_arch = "x86_64"))]
|
||||
unsafe fn outsl(addr: u16, data: *const u32, len: usize) {
|
||||
for i in 0..len {
|
||||
port::outl(addr, *data.add(i));
|
||||
}
|
||||
}
|
||||
|
||||
// MIPS
|
||||
mod port {
|
||||
const PCI_BASE: usize = 0xb8000000;
|
||||
pub unsafe fn inb(port: u16) -> u8 {
|
||||
crate::util::read(port as usize + PCI_BASE)
|
||||
}
|
||||
|
||||
pub unsafe fn outb(port: u16, value: u8) {
|
||||
crate::util::write(port as usize + PCI_BASE, value)
|
||||
}
|
||||
|
||||
pub unsafe fn inl(port: u16) -> u32 {
|
||||
crate::util::read(port as usize + PCI_BASE)
|
||||
}
|
||||
|
||||
pub unsafe fn outl(port: u16, value: u32) {
|
||||
crate::util::write(port as usize + PCI_BASE, value)
|
||||
}
|
||||
}
|
||||
|
||||
pub fn init() {
|
||||
let ide = IDE::new(0);
|
||||
let driver = Arc::new(IDEDriver(Mutex::new(ide)));
|
||||
DRIVERS.write().push(driver.clone());
|
||||
BLK_DRIVERS.write().push(driver.clone());
|
||||
}
|
||||
@ -1,6 +1,7 @@
|
||||
use super::Driver;
|
||||
|
||||
pub mod ahci;
|
||||
pub mod ide;
|
||||
pub mod virtio_blk;
|
||||
|
||||
pub trait BlockDriver: Driver {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user