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Fix compilation

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This commit is contained in:
Jiajie Chen 2020-07-06 07:22:39 +08:00
parent 2589319769
commit 100db70184
5 changed files with 81 additions and 65 deletions
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101
kernel/src/arch/mipsel/interrupt/mod.rs
View File

@ -62,8 +62,11 @@ pub extern "C" fn stack_pointer_not_aligned(sp: usize) {
#[no_mangle]
pub extern "C" fn trap_handler(tf: &mut TrapFrame) {
use cp0::cause::Exception as E;
trace!("Exception @ CPU{}: {:?} ", 0, tf.cause.cause());
match tf.cause.cause() {
let cause = cp0::cause::Cause {
bits: tf.cause as u32,
};
trace!("Exception @ CPU{}: {:?} ", 0, cause.cause());
match cause.cause() {
E::Interrupt => interrupt_dispatcher(tf),
E::Syscall => syscall(tf),
E::TLBModification => page_fault(tf),
@ -71,7 +74,7 @@ pub extern "C" fn trap_handler(tf: &mut TrapFrame) {
E::TLBStoreMiss => page_fault(tf),
E::ReservedInstruction => {
if !reserved_inst(tf) {
error!("Unhandled Exception @ CPU{}: {:?} ", 0, tf.cause.cause());
error!("Unhandled Exception @ CPU{}: {:?} ", 0, cause.cause());
} else {
tf.epc = tf.epc + 4;
}
@ -80,13 +83,14 @@ pub extern "C" fn trap_handler(tf: &mut TrapFrame) {
tf.epc = tf.epc + 4;
}
_ => {
error!("Unhandled Exception @ CPU{}: {:?} ", 0, tf.cause.cause());
error!("Unhandled Exception @ CPU{}: {:?} ", 0, cause.cause());
}
}
trace!("Interrupt end");
}
fn interrupt_dispatcher(tf: &mut TrapFrame) {
/*
let pint = tf.cause.pending_interrupt();
trace!(" Interrupt {:08b} ", pint);
if (pint & 0b100_000_00) != 0 {
@ -96,6 +100,7 @@ fn interrupt_dispatcher(tf: &mut TrapFrame) {
} else {
ipi();
}
*/
}
fn external() {
@ -136,60 +141,62 @@ fn timer() {
fn syscall(tf: &mut TrapFrame) {
tf.epc += 4; // Must before syscall, because of fork.
let arguments = [tf.a0, tf.a1, tf.a2, tf.a3, tf.t0, tf.t1];
trace!(
"MIPS syscall {} invoked with {:x?}, epc = {:x?}",
tf.v0,
arguments,
tf.epc
);
/*
let arguments = [tf.a0, tf.a1, tf.a2, tf.a3, tf.t0, tf.t1];
trace!(
"MIPS syscall {} invoked with {:x?}, epc = {:x?}",
tf.v0,
arguments,
tf.epc
);
*/
//let ret = crate::syscall::syscall(tf.v0, arguments, tf) as isize;
let ret = 0;
let ret = 0 as isize;
// comply with mips n32 abi, always return a positive value
// https://git.musl-libc.org/cgit/musl/tree/arch/mipsn32/syscall_arch.h
if ret < 0 {
tf.v0 = (-ret) as usize;
tf.a3 = 1;
tf.general.v0 = (-ret) as usize;
tf.general.a3 = 1;
} else {
tf.v0 = ret as usize;
tf.a3 = 0;
tf.general.v0 = ret as usize;
tf.general.a3 = 0;
}
}
fn set_trapframe_register(rt: usize, val: usize, tf: &mut TrapFrame) {
match rt {
1 => tf.at = val,
2 => tf.v0 = val,
3 => tf.v1 = val,
4 => tf.a0 = val,
5 => tf.a1 = val,
6 => tf.a2 = val,
7 => tf.a3 = val,
8 => tf.t0 = val,
9 => tf.t1 = val,
10 => tf.t2 = val,
11 => tf.t3 = val,
12 => tf.t4 = val,
13 => tf.t5 = val,
14 => tf.t6 = val,
15 => tf.t7 = val,
16 => tf.s0 = val,
17 => tf.s1 = val,
18 => tf.s2 = val,
19 => tf.s3 = val,
20 => tf.s4 = val,
21 => tf.s5 = val,
22 => tf.s6 = val,
23 => tf.s7 = val,
24 => tf.t8 = val,
25 => tf.t9 = val,
26 => tf.k0 = val,
27 => tf.k1 = val,
28 => tf.gp = val,
29 => tf.sp = val,
30 => tf.fp = val,
31 => tf.ra = val,
1 => tf.general.at = val,
2 => tf.general.v0 = val,
3 => tf.general.v1 = val,
4 => tf.general.a0 = val,
5 => tf.general.a1 = val,
6 => tf.general.a2 = val,
7 => tf.general.a3 = val,
8 => tf.general.t0 = val,
9 => tf.general.t1 = val,
10 => tf.general.t2 = val,
11 => tf.general.t3 = val,
12 => tf.general.t4 = val,
13 => tf.general.t5 = val,
14 => tf.general.t6 = val,
15 => tf.general.t7 = val,
16 => tf.general.s0 = val,
17 => tf.general.s1 = val,
18 => tf.general.s2 = val,
19 => tf.general.s3 = val,
20 => tf.general.s4 = val,
21 => tf.general.s5 = val,
22 => tf.general.s6 = val,
23 => tf.general.s7 = val,
24 => tf.general.t8 = val,
25 => tf.general.t9 = val,
26 => tf.general.k0 = val,
27 => tf.general.k1 = val,
28 => tf.general.gp = val,
29 => tf.general.sp = val,
30 => tf.general.fp = val,
31 => tf.general.ra = val,
_ => {
error!("Unknown register {:?} ", rt);
//crate::trap::error(tf)

1
kernel/src/arch/mipsel/memory.rs
View File

@ -76,4 +76,5 @@ pub fn set_page_table(vmtoken: usize) {
pub fn get_page_fault_addr() -> usize {
// TODO
0
}

10
kernel/src/drivers/serial/ti_16c550c.rs
View File

@ -39,7 +39,7 @@ impl SerialPort {
}
/// blocking version of getchar()
pub fn getchar(&mut self) -> char {
pub fn getchar(&mut self) -> u8 {
loop {
if (read::<u8>(self.base + COM_LSR) & 0x01) == 0 {
break;
@ -47,16 +47,16 @@ impl SerialPort {
}
let c = read::<u8>(self.base + COM_RX);
match c {
255 => '\0', // null
c => c as char,
255 => 0, // null
c => c,
}
}
/// non-blocking version of getchar()
pub fn getchar_option(&mut self) -> Option<char> {
pub fn getchar_option(&mut self) -> Option<u8> {
match read::<u8>(self.base + COM_LSR) & 0x01 {
0 => None,
_ => Some(read::<u8>(self.base + COM_RX) as u8 as char),
_ => Some(read::<u8>(self.base + COM_RX) as u8),
}
}

4
kernel/src/syscall/fs.rs
View File

@ -1194,7 +1194,7 @@ impl Syscall<'_> {
if times[0].nsec == UTIME_NOW {
times[0] = TimeSpec::get_epoch();
}
metadata.atime = Timespec {
metadata.atime = rcore_fs::vfs::Timespec {
sec: times[0].sec as i64,
nsec: times[0].nsec as i32,
};
@ -1203,7 +1203,7 @@ impl Syscall<'_> {
if times[1].nsec == UTIME_NOW {
times[1] = TimeSpec::get_epoch();
}
metadata.mtime = Timespec {
metadata.mtime = rcore_fs::vfs::Timespec {
sec: times[1].sec as i64,
nsec: times[1].nsec as i32,
};

30
kernel/src/syscall/mod.rs
View File

@ -355,9 +355,12 @@ impl Syscall<'_> {
}
#[cfg(not(target_arch = "mips"))]
SYS_SEMCTL => self.sys_semctl(args[0], args[1], args[2], args[3]),
// msg
#[cfg(not(target_arch = "mips"))]
SYS_MSGGET => self.unimplemented("msgget", Ok(0)),
#[cfg(target_arch = "mips")]
SYS_SHMGET => self.unimplemented("shmget", Ok(0)),
#[cfg(not(target_arch = "mips"))]
SYS_MSGCTL => self.unimplemented("msgctl", Ok(0)),
// shm
#[cfg(not(target_arch = "mips"))]
@ -426,14 +429,13 @@ impl Syscall<'_> {
SYS_GET_PADDR => {
self.sys_get_paddr(args[0] as *const u64, args[1] as *mut u64, args[2])
}
SYS_MSGCTL => self.unimplemented("msgctl", Ok(0)),
_ => {
let ret = match () {
#[cfg(target_arch = "x86_64")]
() => self.x86_64_syscall(id, args).await,
#[cfg(target_arch = "mips")]
() => self.mips_syscall(id, args),
() => self.mips_syscall(id, args).await,
#[cfg(all(not(target_arch = "x86_64"), not(target_arch = "mips")))]
() => None,
};
@ -474,10 +476,13 @@ impl Syscall<'_> {
}
#[cfg(target_arch = "mips")]
fn mips_syscall(&mut self, id: usize, args: [usize; 6]) -> Option<SysResult> {
async fn mips_syscall(&mut self, id: usize, args: [usize; 6]) -> Option<SysResult> {
let ret = match id {
SYS_OPEN => self.sys_open(args[0] as *const u8, args[1], args[2]),
SYS_POLL => self.sys_poll(args[0] as *mut PollFd, args[1], args[2]),
SYS_POLL => {
self.sys_poll(UserInOutPtr::from(args[0]), args[1], args[2])
.await
}
SYS_DUP2 => self.sys_dup2(args[0], args[1]),
SYS_FORK => self.sys_fork(),
SYS_MMAP2 => self.sys_mmap(args[0], args[1], args[2], args[3], args[4], args[5] * 4096),
@ -489,10 +494,10 @@ impl Syscall<'_> {
match self.sys_pipe(fd_ptr) {
Ok(_code) => {
unsafe {
self.tf.v0 = *fd_ptr as usize;
self.tf.v1 = *(fd_ptr.add(1)) as usize;
self.context.general.v0 = *fd_ptr as usize;
self.context.general.v1 = *(fd_ptr.add(1)) as usize;
}
Ok(self.tf.v0)
Ok(self.context.general.v0)
}
Err(err) => Err(err),
}
@ -511,8 +516,11 @@ impl Syscall<'_> {
Ok(0)
}
SYS_IPC => match args[0] {
1 => self.sys_semop(args[1], UserInPtr::from(args[2]), args[3]),
2 => self.sys_semget(args[1], args[2] as isize, args[3]),
1 => {
self.sys_semop(args[1], UserInPtr::from(args[2]), args[3])
.await
}
2 => self.sys_semget(args[1], args[2], args[3]),
3 => self.sys_semctl(args[1], args[2], args[3], args[4]),
_ => return None,
},