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mirror of https://github.com/rcore-os/rCore.git synced 2024-11-24 17:06:18 +04:00

Move arch specific code to arch

This commit is contained in:
Jiajie Chen 2020-06-30 12:27:29 +08:00
parent 8822964045
commit 16eb1ed7e2
12 changed files with 102 additions and 41 deletions

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@ -8,10 +8,10 @@ Going to be the next generation teaching operating system.
Supported architectures and boards: Supported architectures and boards:
* x86_64: QEMU, PC (i5/i7) * x86_64(Tier 1): QEMU, PC (i5/i7)
* RISCV32/64: QEMU, HiFive Unleashed * RISCV32/64(Tier 2): QEMU, HiFive Unleashed
* AArch64: QEMU, Raspberry Pi 3B+ * AArch64(Tier 2): QEMU, Raspberry Pi 3B+
* MIPS32: QEMU, [TrivialMIPS](https://github.com/Harry-Chen/TrivialMIPS) * MIPS32(Tier 3): QEMU, [TrivialMIPS](https://github.com/Harry-Chen/TrivialMIPS)
![demo](./docs/2_OSLab/os2atc/demo.png) ![demo](./docs/2_OSLab/os2atc/demo.png)
@ -74,7 +74,7 @@ See [Makefile](kernel/Makefile) for more usages.
This is a project of THU courses: This is a project of THU courses:
* [Operating System (2018 Spring) ](http://os.cs.tsinghua.edu.cn/oscourse/OS2018spring/projects/g11) * [Operating System (2018 Spring)](http://os.cs.tsinghua.edu.cn/oscourse/OS2018spring/projects/g11)
* [Comprehensive Experiment of Computer System (2018 Summer)](http://os.cs.tsinghua.edu.cn/oscourse/csproject2018/group05) * [Comprehensive Experiment of Computer System (2018 Summer)](http://os.cs.tsinghua.edu.cn/oscourse/csproject2018/group05)
* [Operating System Train (2018 Autumn)](http://os.cs.tsinghua.edu.cn/oscourse/OsTrain2018) * [Operating System Train (2018 Autumn)](http://os.cs.tsinghua.edu.cn/oscourse/OsTrain2018)
* [Operating System (2019 Spring)](http://os.cs.tsinghua.edu.cn/oscourse/OS2019spring/projects) * [Operating System (2019 Spring)](http://os.cs.tsinghua.edu.cn/oscourse/OS2019spring/projects)

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@ -145,6 +145,7 @@ qemu_net_opts += \
-device virtio-net-device,netdev=net0 -device virtio-net-device,netdev=net0
else ifeq ($(ARCH), aarch64) else ifeq ($(ARCH), aarch64)
# raspi must have at least 4 cpus
qemu_opts += \ qemu_opts += \
-machine $(BOARD) \ -machine $(BOARD) \
-smp 4 \ -smp 4 \

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@ -63,3 +63,9 @@
### fp ### fp
- struct FpState浮点的状态 - struct FpState浮点的状态
### signal
- struct MachineContext和 Linux 中的 mcontext 一致
- RETCODE调用 rt_sigreturn syscall 的指令
- set_signal_handler设置 signal handler

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@ -1,3 +1,5 @@
//! SPDX-License-Identifier: (Apache-2.0 OR MIT)
#[derive(Debug, Copy, Clone, Default)] #[derive(Debug, Copy, Clone, Default)]
pub struct FpState {} pub struct FpState {}

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@ -1,3 +1,5 @@
use crate::signal::Siginfo;
use crate::signal::SignalUserContext;
use trapframe::UserContext; use trapframe::UserContext;
// mcontext // mcontext
@ -119,3 +121,23 @@ impl MachineContext {
tf.spsr = self.pstate; tf.spsr = self.pstate;
} }
} }
// TODO
pub const RET_CODE: [u8; 7] = [0; 7];
pub fn set_signal_handler(
tf: &mut UserContext,
sp: usize,
handler: usize,
signo: usize,
siginfo: *const Siginfo,
ucontext: *const SignalUserContext,
) {
tf.sp = sp;
tf.elr = handler;
// pass handler argument
tf.general.x0 = signo as usize;
tf.general.x1 = siginfo as usize;
tf.general.x2 = ucontext as usize;
}

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@ -1,3 +1,5 @@
use crate::signal::Siginfo;
use crate::signal::SignalUserContext;
use trapframe::UserContext; use trapframe::UserContext;
// mcontext_t // mcontext_t
@ -79,3 +81,23 @@ impl MachineContext {
pub fn fill_tf(&self, ctx: &mut UserContext) {} pub fn fill_tf(&self, ctx: &mut UserContext) {}
} }
// TODO
pub const RET_CODE: [u8; 7] = [0; 7];
pub fn set_signal_handler(
tf: &mut UserContext,
sp: usize,
handler: usize,
signo: usize,
siginfo: *const Siginfo,
ucontext: *const SignalUserContext,
) {
tf.general.sp = sp;
tf.sepc = handler;
// pass handler argument
tf.general.a0 = signo as usize;
tf.general.a1 = siginfo as usize;
tf.general.a2 = ucontext as usize;
}

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@ -1,3 +1,4 @@
use crate::signal::{Siginfo, SignalUserContext};
use trapframe::{GeneralRegs, UserContext}; use trapframe::{GeneralRegs, UserContext};
/// struct mcontext /// struct mcontext
@ -95,3 +96,27 @@ impl MachineContext {
ctx.error_code = self.err; ctx.error_code = self.err;
} }
} }
pub const RET_CODE: [u8; 7] = [
// mov SYS_RT_SIGRETURN, %eax
0xb8, // SYS_RT_SIGRETURN
15, 0, 0, 0, // syscall
0x0f, 0x05,
];
pub fn set_signal_handler(
tf: &mut UserContext,
sp: usize,
handler: usize,
signo: usize,
siginfo: *const Siginfo,
ucontext: *const SignalUserContext,
) {
tf.general.rsp = sp;
tf.general.rip = handler;
// pass handler argument
tf.general.rdi = signo as usize;
tf.general.rsi = siginfo as usize;
tf.general.rdx = ucontext as usize;
}

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@ -1,3 +1,4 @@
//! Provide backtrace upon panic
use core::mem::size_of; use core::mem::size_of;
extern "C" { extern "C" {

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@ -1,5 +1,4 @@
#![allow(dead_code)] //! Global constants
pub use crate::arch::consts::*; pub use crate::arch::consts::*;
pub const MAX_CPU_NUM: usize = 64; pub const MAX_CPU_NUM: usize = 64;

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@ -1,18 +1,6 @@
//! Define the FrameAllocator for physical memory //! Define the FrameAllocator for physical memory
//! x86_64 -- 64GB
//! AARCH64/MIPS/RV -- 1GB
//! NOTICE:
//! type FrameAlloc = bitmap_allocator::BitAllocXXX
//! KSTACK_SIZE -- 16KB
//!
//! KERNEL_HEAP_SIZE:
//! x86-64 -- 32MB
//! AARCH64/RV64 -- 8MB
//! MIPS/RV32 -- 2MB
//! mipssim/malta(MIPS) -- 10MB
use super::HEAP_ALLOCATOR; use super::HEAP_ALLOCATOR;
pub use crate::arch::paging::*;
use crate::consts::{KERNEL_OFFSET, MEMORY_OFFSET, PHYSICAL_MEMORY_OFFSET}; use crate::consts::{KERNEL_OFFSET, MEMORY_OFFSET, PHYSICAL_MEMORY_OFFSET};
use crate::process::current_thread; use crate::process::current_thread;
use crate::sync::SpinNoIrqLock; use crate::sync::SpinNoIrqLock;
@ -21,9 +9,10 @@ use buddy_system_allocator::Heap;
use core::mem; use core::mem;
use core::mem::size_of; use core::mem::size_of;
use log::*; use log::*;
pub use rcore_memory::memory_set::{handler::*, MemoryArea, MemoryAttr};
use rcore_memory::*; use rcore_memory::*;
pub use crate::arch::paging::*;
pub use rcore_memory::memory_set::{handler::*, MemoryArea, MemoryAttr};
pub type MemorySet = rcore_memory::memory_set::MemorySet<PageTableImpl>; pub type MemorySet = rcore_memory::memory_set::MemorySet<PageTableImpl>;
// x86_64 support up to 1T memory // x86_64 support up to 1T memory

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@ -1,4 +1,7 @@
use crate::arch::{signal::MachineContext, syscall::SYS_RT_SIGRETURN}; use crate::arch::{
signal::{set_signal_handler, MachineContext, RET_CODE},
syscall::SYS_RT_SIGRETURN,
};
use crate::process::{process, process_of, Process, Thread}; use crate::process::{process, process_of, Process, Thread};
use crate::sync::{Event, MutexGuard, SpinNoIrq, SpinNoIrqLock as Mutex}; use crate::sync::{Event, MutexGuard, SpinNoIrq, SpinNoIrqLock as Mutex};
use alloc::sync::Arc; use alloc::sync::Arc;
@ -250,25 +253,16 @@ pub fn handle_signal(thread: &Arc<Thread>, tf: &mut UserContext) -> bool {
} else { } else {
frame.ret_code_addr = frame.ret_code.as_ptr() as usize; frame.ret_code_addr = frame.ret_code.as_ptr() as usize;
// mov SYS_RT_SIGRETURN, %eax // mov SYS_RT_SIGRETURN, %eax
frame.ret_code[0] = 0xb8; frame.ret_code.copy_from_slice(&RET_CODE);
// TODO: ref plz
unsafe {
*(frame.ret_code.as_ptr().add(1) as *mut u32) = SYS_RT_SIGRETURN as u32;
}
// syscall
frame.ret_code[5] = 0x0f;
frame.ret_code[6] = 0x05;
}
#[cfg(target_arch = "x86_64")]
{
tf.general.rsp = sig_sp;
tf.general.rip = action.handler;
// pass handler argument
tf.general.rdi = info.signo as usize;
tf.general.rsi = &frame.info as *const Siginfo as usize;
tf.general.rdx = &frame.ucontext as *const SignalUserContext as usize;
} }
set_signal_handler(
tf,
sig_sp,
action.handler,
info.signo as usize,
&frame.info as *const Siginfo,
&frame.ucontext as *const SignalUserContext,
);
} }
} }
} }

2
user

@ -1 +1 @@
Subproject commit 84daa580e5dde1f8e16510ec1dcbdc298d13d725 Subproject commit 291df7f66ed42f642cd691554fa0c88e59cdb894