mirror of https://github.com/rcore-os/rCore.git synced 2024-11-26 01:43:29 +04:00

Rust version of THU uCore OS. Linux compatible.

Go to file

Harry Chen ef9a038ef5 Update user Signed-off-by: Harry Chen <i@harrychen.xyz>		2019-05-09 11:12:10 +08:00
bootloader	aarch64: disable FP/SIMD registers again, update crates	2019-05-07 22:37:53 +08:00
crate	Align MemorySet with 64bytes.	2019-05-07 00:38:39 +08:00
docs	add figure for some important rcore structures	2019-04-28 00:11:54 +08:00
kernel	Merge remote-tracking branch 'rcore/dev' into dev	2019-05-09 10:24:12 +08:00
tests	Fix riscv32 testing	2019-05-03 15:17:06 +08:00
tools	stage debug code for output	2019-05-02 21:32:19 +08:00
user@ad822e6d3b	Update user	2019-05-09 11:12:10 +08:00
.gitignore	.gitignore updated.	2019-04-12 13:10:34 +08:00
.gitmodules	replace riscv-pk by OpenSBI !	2019-04-20 00:15:55 +08:00
.travis.yml	replace gnu binutils with cargo-binutils	2019-04-12 00:23:34 +08:00
Cargo.toml	move bit-allocator and rcore-thread crate to remote	2019-04-04 12:45:55 +08:00
LICENSE	update README. add LICENSE	2018-12-02 22:19:32 +08:00
README.md	Update README	2019-05-09 11:01:48 +08:00
rust-toolchain	Move to a newer rust toolchain with rls	2019-03-25 13:00:09 +08:00

README.md

rCore

Rust version of THU uCore OS Plus.

Going to be the next generation teaching operating system.

Supported architectures: x86_64, RISCV32/64, AArch64, MIPS32

Tested boards: QEMU, HiFive Unleashed, x86_64 PC (i5/i7), Raspberry Pi 3B+, Kendryte K210 and FPGA running Rocket Chip / TrivialMIPS

Building

Environment

Rust toolchain at nightly-2019-03-05
Cargo tools: cargo-xbuild
QEMU >= 3.1.0
bootimage (for x86_64)
RISCV64 GNU toolchain (for riscv32/64)
AArch64 GNU toolchain (for aarch64)
musl-cross-make (for userland musl, or download prebuilt toolchain from musl.cc)
libfuse-dev (for userland image generation)

See Travis script for details.

How to run

$ rustup component add rust-src llvm-tools-preview
$ cargo install cargo-binutils
$ cargo install cargo-xbuild --force
$ cargo install bootimage --version 0.5.7 --force

$ git clone https://github.com/rcore-os/rCore.git --recursive
$ cd rCore/user
$ make sfsimg arch={riscv32,riscv64,x86_64,aarch64,mipsel} # requires $(arch)-linux-musl-gcc
$ cd ../kernel
$ make run arch={riscv32,riscv64,x86_64,aarch64,mipsel} mode=release
$ make run arch=x86_64 mode=release pci_passthru=0000:00:00.1 # for ixgbe real nic, find its pci (bus, dev, func) first

Maintainers

Module	Maintainer
x86_64	@wangrunji0408
RISC-V	@jiegec
ARM (Raspi3)	@equation314
MIPS	@Harry_Chen @miskcoo
Memory, Process, File System	@wangrunji0408
Network with drivers	@jiegec
GUI	@equation314

History

This is a project of THU courses:

Reports and Dev docs (in Chinese)

It's based on BlogOS , a demo project in the excellent tutorial Writing an OS in Rust (First Edition).

License

The source code is dual-licensed under MIT or the Apache License (Version 2.0).