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Author	SHA1	Message	Date
WangRunji	97b838981f	Fix console	2018-07-16 22:02:03 +08:00
WangRunji	cf1a2d3450	Simple kernel shell	2018-07-16 17:31:29 +08:00
WangRunji	542a06d50e	Set default log level to WARN	2018-07-16 17:28:15 +08:00
WangRunji	f7e6ffcbda	Try to fix travis for both arch	2018-07-16 14:44:21 +08:00
WangRunji	5647fb1273	Fix build guide	2018-07-16 13:37:26 +08:00
WangRunji	60c2a77ac1	Unify IO in arch	2018-07-16 09:48:58 +08:00
WangRunji	f1407dff7b	Note the reason of double fault in x86_64 release mode.	2018-07-15 20:51:14 +08:00
WangRunji	1cb50c00ba	Fit for SFS	2018-07-15 16:44:21 +08:00
WangRunji	6b0556e135	Add Cargo.lock	2018-07-15 16:43:43 +08:00
WangRunji	0c9679b710	Fix fork and syscall return value.	2018-07-15 01:07:25 +08:00
WangRunji	27daa6d491	Fix user trap	2018-07-15 00:45:53 +08:00
WangRunji	69bc5caa81	Fix syscall return value, args. Pass hello.	2018-07-14 18:42:58 +08:00
WangRunji	76f5af7d30	Merge rust_main. Change the way to pass multiboot info address.	2018-07-14 17:58:33 +08:00
WangRunji	c768ec3e1e	Recover fs for RV32. Add user-riscv.img ... Now load user programs from SFS data linked at kernel.	2018-07-14 17:41:45 +08:00
WangRunji	019770c92d	Modify build path	2018-07-14 15:09:13 +08:00
WangRunji	3286fed36c	Recover syscall for RV32	2018-07-14 12:28:55 +08:00
WangRunji	1ad3ed738e	Can run user program in RV32	2018-07-14 11:56:55 +08:00
WangRunji	c0138c4c35	Fix linking user program binaries	2018-07-14 01:11:47 +08:00
WangRunji	ee80a3eeb7	Fix compile user for RV32	2018-07-14 00:39:49 +08:00
WangRunji	935bcb3e15	Change user sub-project structure	2018-07-13 22:17:24 +08:00
WangRunji	f819a702c7	User programs Rust workspace. Compile OK for x86_64.	2018-07-13 15:12:35 +08:00
WangRunji	4faa8a65ae	Move kernel to a new directory	2018-07-13 12:25:39 +08:00
WangRunji	02586cdb98	Move x86_64 specific external crate to arch mod	2018-07-13 11:23:01 +08:00
WangRunji	89bcd5f660	Fix kernel thread	2018-07-13 01:45:48 +08:00
WangRunji	e3a80a1223	Better some logging	2018-07-13 01:45:16 +08:00
WangRunji	9001ac1f3d	Fix enter second kernel thread. But page fault now.	2018-07-13 00:00:42 +08:00
WangRunji	b1a3695dfb	Prettify log output	2018-07-12 23:31:54 +08:00
WangRunji	4914d22f44	Update doc & README	2018-07-12 22:46:17 +08:00
WangRunji	f055ba7b23	Move kernel base to 0x80020000	2018-07-12 22:44:34 +08:00
WangRunji	7b4cc6d772	Fix log crate	2018-07-12 20:46:02 +08:00
WangRunji	96d8af8034	Use CowExt for RV32	2018-07-12 19:44:13 +08:00
WangRunji	7d856fe009	Fix memory::cow LLVM error for RV32	2018-07-12 19:35:21 +08:00
WangRunji	5530549a54	Recover process thread sync mod for RV32. Pass compile.	2018-07-12 18:56:29 +08:00
WangRunji	0b5c9c0c68	Print log level	2018-07-12 18:55:11 +08:00
WangRunji	42213081f5	Fix atomic_swap in core	2018-07-12 18:51:44 +08:00
WangRunji	7151c67c2a	Improve LocalKey	2018-07-12 17:19:55 +08:00
WangRunji	8ff40ea1dd	LocalKey / TLS support	2018-07-12 17:06:50 +08:00
WangRunji	7c7dbc9ded	Add CR3 to Context (x86_64)	2018-07-12 16:42:21 +08:00
WangRunji	548951abda	Forget the kernel MemorySet (x86_64)	2018-07-12 12:13:39 +08:00
WangRunji	e12c4c1ddb	Set global bit for kernel region (x86_64)	2018-07-12 12:12:28 +08:00
WangRunji	7f659950cb	Finish memory init	2018-07-12 02:09:41 +08:00
WangRunji	95ab3a2f3b	Allocate kernel stack from heap, remove stack allocator, remove guard page.	2018-07-12 00:33:43 +08:00
WangRunji	81ff6f13e5	Fix recursive mapping, finish kernel remap.	2018-07-11 23:43:28 +08:00
WangRunji	677c1bd565	Impl page table for RV32. TODO: Fix recursive mapping.	2018-07-11 21:37:42 +08:00
WangRunji	6b819d62e4	Fix core::sync::atomic::atomic_store ... It seems to generate an incorrect instruction (swap the dst and val in SW)	2018-07-11 21:35:21 +08:00
WangRunji	f7d75696bc	Move more to x86_64 arch	2018-07-11 10:57:07 +08:00
WangRunji	d3ed84ba61	Fix compile	2018-07-11 00:53:40 +08:00
WangRunji	aecb85d5e7	Move MemorySet out to memory crate	2018-07-10 21:54:16 +08:00
WangRunji	5c14673fe0	Setup a simple page table, enable paging.	2018-07-10 17:37:38 +08:00
WangRunji	b26fee1990	Make more mods common for both x86_64 & riscv32.	2018-07-10 17:07:03 +08:00