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Author	SHA1	Message	Date
WangRunji	15b1687ac6	Complete IOAPIC init	2018-04-14 20:44:49 +08:00
WangRunji	a76bfbc7f8	Copy PIC mod from Redox	2018-04-14 20:18:59 +08:00
WangRunji	4029e6d2d3	Fix gdt compile error	2018-04-14 20:18:37 +08:00
WangRunji	2f24eefb1d	Copy GDT Segments from xv6 x86_64. Split IRQ mod.	2018-04-14 01:13:12 +08:00
WangRunji	ab37e359ac	Temporarily map pages and run pass APIC init.	2018-04-13 22:57:41 +08:00
WangRunji	5d03035f9e	Add page fault handler	2018-04-13 22:22:52 +08:00
WangRunji	bacc97ee94	Move address to memory mod.	2018-04-13 20:28:38 +08:00
WangRunji	03d4adfcfe	Fix rsp. Use PhysicalAddress.	2018-04-13 18:41:39 +08:00
WangRunji	ca683e4787	More strict PhysicalAddress type	2018-04-13 15:14:19 +08:00
WangRunji	3b4f855763	Modify remap_kernel()	2018-04-13 14:22:50 +08:00
WangRunji	5db8c6f836	Add consts.rs from Redox.	2018-04-13 14:22:09 +08:00
WangRunji	02773ed2f4	Move kernel virtual address to high zone. Change asm.	2018-04-13 14:21:09 +08:00
WangRunji	96258c6a0b	Rewrite build.rs again	2018-04-13 00:54:13 +08:00
WangRunji	21d97418d6	Impl lapic linking C code. Fix build.rs in macOS.	2018-04-12 23:46:44 +08:00
WangRunji	b549d08724	Add debug_asm in Makefile	2018-04-12 23:44:25 +08:00
WangRunji	5c80d903ad	Finish ACPI init	2018-04-12 20:57:56 +08:00
WangRunji	8f3d7432d6	Add mid presentation	2018-04-12 20:23:19 +08:00
WangRunji	2ffa236414	Add mid report	2018-04-12 15:53:34 +08:00
WangRunji	06d85a5ce9	Rewrite build.rs	2018-04-11 21:48:29 +08:00
WangRunji	8c7ca612e7	Add example of binding C	2018-04-11 21:27:11 +08:00
WangRunji	7f872901ce	Serial stdio	2018-04-10 20:46:24 +08:00
WangRunji	fc910d4b9d	Change test pass error code, to avoid conflict with QEMU's	2018-04-09 22:22:43 +08:00
WangRunji	c446d2bb5e	Add test for travis	2018-04-09 21:20:47 +08:00
WangRunji	2e405a0393	Auto exit in qemu	2018-04-09 17:02:18 +08:00
WangRunji	9bf95a5443	Try to fix travis	2018-04-09 15:19:02 +08:00
WangRunji	9adbc16327	Try to add qemu for travis	2018-04-09 15:12:15 +08:00
WangRunji	1de0087d49	Port part of MADT	2018-04-08 02:20:25 +08:00
WangRunji	e9d89576a3	Port acpiinit()	2018-04-07 22:40:22 +08:00
WangRunji	83684cbfd7	Add debug! macro. Modify VGA & Writer	2018-04-07 20:57:14 +08:00
WangRunji	936c485ab9	Port MP & RSDP detecting	2018-04-05 22:36:39 +08:00
WangRunji	eb9a5e9241	Impl Debug for page table	2018-04-05 18:41:31 +08:00
WangRunji	b954aef696	Add cursor for VGA	2018-04-05 01:12:42 +08:00
WangRunji	5bf407de7c	Split vga_buffer.rs to VGA driver and VGA writer	2018-04-05 00:58:23 +08:00
WangRunji	c436b9afbe	Move asm to boot dir. Continue to refactor...	2018-04-04 20:56:56 +08:00
WangRunji	53bb54330c	Update crate to fix compile error	2018-04-03 21:42:23 +08:00
WangRunji	9ee8d3a428	Add homebrew files for macOS	2018-04-03 14:49:26 +08:00
WangRunji	771839f0d7	Make it compile on macOS	2018-04-02 17:48:07 +08:00
WangRunji	4ce1ba8f6d	Rewrite README. Add docker.	2018-04-02 15:28:32 +08:00
Philipp Oppermann	7f6576c9dc	Set the stack index of the double fault IDT entry	2017-11-19 14:24:33 +01:00
Philipp Oppermann	aa8028cf6c	Reload cs register and load TSS	2017-11-19 14:24:33 +01:00
Philipp Oppermann	165054d12a	Create and load a static TSS and GDT	2017-11-19 14:24:33 +01:00
Philipp Oppermann	58e90d497e	Add a Gdt::load method	2017-11-19 14:24:33 +01:00
Philipp Oppermann	238cc575c3	Add a Gdt::add_entry method	2017-11-19 14:24:33 +01:00
Philipp Oppermann	d2060e76f8	Create a GDT descriptor struct	2017-11-19 14:24:33 +01:00
Philipp Oppermann	f651987666	Add a dependency on bit_field	2017-11-19 14:24:33 +01:00
Philipp Oppermann	eea8c10a97	Create a interrupts::gdt submodule	2017-11-19 14:24:27 +01:00
Philipp Oppermann	e1d2af5ea7	Rename interrupts.rs to interrupts/mod.rs	2017-11-19 14:24:27 +01:00
Philipp Oppermann	a05db759d7	Create a TSS and save the double fault stack pointer it its IST	2017-11-19 14:24:27 +01:00
Philipp Oppermann	00bbd6fbc6	Pass the memory controller to interrupts::init and use it to create a double fault stack	2017-11-19 14:24:27 +01:00
Philipp Oppermann	f1459a552c	Return a memory controller from memory::init	2017-11-19 14:24:27 +01:00