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Author SHA1 Message Date
Yuhao Zhou
d2f2fa3d97 Two syscall for mips. 2019-04-17 17:42:05 +08:00
Yuhao Zhou
3e7dd81dec Add lstat, fix timespec for musln32. 2019-04-17 17:37:28 +08:00
Yuhao Zhou
189c4aa5c6 Support sys_pipe for MIPS. 2019-04-16 02:42:44 +08:00
Yuhao Zhou
f5fe3ce4f3 Move userstack to 0x60000000. 2019-04-16 02:10:36 +08:00
Yuhao Zhou
9532311c1e Copy TLS data in sys_fork. 2019-04-16 01:31:00 +08:00
Yuhao Zhou
dc90cb5a8d Fix pgfault, fstat syscall convention. biscuit/ls works! 2019-04-15 18:09:48 +08:00
Yuhao Zhou
9075a172ad Fix iovec size for MIPSn32. 2019-04-15 15:45:09 +08:00
Yuhao Zhou
bfa4c9d47e Support TLS for MIPS. 2019-04-15 14:14:07 +08:00
Yuhao Zhou
657395784d Fix compile errors. 2019-04-15 13:02:06 +08:00
Yuhao Zhou
d46c10a0a2 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-10 00:40:54 +08:00
Yuhao Zhou
d6ce309247 Fix some review issues. 2019-04-10 00:38:31 +08:00
Harry Chen
75ba0859cf Run cargo fmt 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 17:08:04 +08:00
Harry Chen
9b5f7b8078 Use host gcc for preprocessing in makefile 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 17:06:33 +08:00
Harry Chen
801b2e609a Fix makefile for aarch64 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 16:16:09 +08:00
Harry Chen
782da8761d Fix travis config (forget in last commit) 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:51:34 +08:00
Harry Chen
aa9bf593e2 Fix Makefile for aarch64, install dtc in travis config 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:47:04 +08:00
Harry Chen
4fc32572b0 Fix some review problems, add mispel arch to CI 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 13:31:56 +08:00
Harry Chen
37a69c2a47 Update user repo to latest version, ready for first merge 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 12:34:30 +08:00
Harry Chen
358e682bad Enable PCI initialization for matal, update mips crate and user app repo 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-09 01:08:49 +08:00
Yuhao Zhou
067d4d1193 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 22:36:15 +08:00
Yuhao Zhou
9078190e28 Fix many bugs. 
* timer counter overflow
* clear TLB when switching context
* fix cp0.ebase access (sel = 1)
* clear TLB when editing page table
 2019-04-08 22:35:02 +08:00
Harry Chen
39a4dd2ff0 Fix VGA driver, now screen lightens on malta! 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 20:53:14 +08:00
Yuhao Zhou
2baf15acac Update kstack switch. 2019-04-08 14:29:27 +08:00
Yuhao Zhou
4a81242552 Fix kstack switch. 2019-04-08 12:50:30 +08:00
Yuhao Zhou
248623096b Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 04:49:22 +08:00
Yuhao Zhou
b6aa9858d3 Fix return register in sys_clone. 2019-04-08 04:47:36 +08:00
Harry Chen
7e3d26ce6b Add debug output for qemu vga driver, still not working... 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:59:42 +08:00
Harry Chen
a57a22a26b Fix VGA initialization with correct PCI address 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:18:31 +08:00
Harry Chen
8754a6eb15 Add PCI initialization in QEMU stdvga 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 03:03:35 +08:00
Harry Chen
c32b0d6bee Add VGA implementation for mipsel malta board 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 02:06:30 +08:00
Harry Chen
4e72c66087 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-08 01:45:57 +08:00
Harry Chen
df3eb0e1da Add ColorConfig support to framebuffer driver 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-08 01:30:25 +08:00
Yuhao Zhou
684a2c5dd8 Fix syscall return register. 2019-04-08 01:00:26 +08:00
Harry Chen
12598a07bf Update to latest user app 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:59:09 +08:00
Harry Chen
706f7e4e9a Fix UART controller for malta, now input works! 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:52:10 +08:00
Harry Chen
ecdbc9fd7a Switch to uart2 on malta to get interrupts (not working) 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:36:29 +08:00
Harry Chen
b1fa65b9c9 Use syscall from MIPS o32 ABI, read boot command line in dts from 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 18:04:28 +08:00
Harry Chen
88bda7c4a0 Use Linux syscall number for mips N32 ABI, update user app 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 17:08:03 +08:00
Harry Chen
a0f298f6dd Use MIPS N32 abi for syscall handling 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 16:21:15 +08:00
Yuhao Zhou
9d576b4827 Update Cargo.lock for rust-mips. 2019-04-07 04:21:35 +08:00
Yuhao Zhou
da8d32c0cf Update syscall convention. 2019-04-07 04:20:17 +08:00
Yuhao Zhou
94d4d01cd5 Merge branch 'mipsel' of github.com:oscourse-tsinghua/rcore_plus into mipsel 2019-04-07 02:46:21 +08:00
Yuhao Zhou
f535073fbc Support user thread. 2019-04-07 02:45:41 +08:00
Harry Chen
bb123add18 Eliminate multiple warnings, update user app repo 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-07 01:32:32 +08:00
Yuhao Zhou
fbc421ee4c Fix trapframe size. 2019-04-06 23:50:05 +08:00
Harry Chen
a2e98d73fd Extract serial driver and add mipssim board for mipsel 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-06 21:59:16 +08:00
Yuhao Zhou
3d083eec0c Fix pgfault handler. 2019-04-06 21:08:36 +08:00
Yuhao Zhou
5e44304f74 Fix root page table ptr/buffer. 2019-04-06 20:26:10 +08:00
Yuhao Zhou
1f8b73744c Disable multi-CPU. 2019-04-06 19:26:14 +08:00
Harry Chen
bb374ba4bd Mock a Mutex for serial on thinpad 
Signed-off-by: Harry Chen <i@harrychen.xyz>
 2019-04-06 17:17:20 +08:00