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Author	SHA1	Message	Date
WangRunji	935bcb3e15	Change user sub-project structure	2018-07-13 22:17:24 +08:00
WangRunji	f819a702c7	User programs Rust workspace. Compile OK for x86_64.	2018-07-13 15:12:35 +08:00
WangRunji	4faa8a65ae	Move kernel to a new directory	2018-07-13 12:25:39 +08:00
WangRunji	02586cdb98	Move x86_64 specific external crate to arch mod	2018-07-13 11:23:01 +08:00
WangRunji	89bcd5f660	Fix kernel thread	2018-07-13 01:45:48 +08:00
WangRunji	e3a80a1223	Better some logging	2018-07-13 01:45:16 +08:00
WangRunji	9001ac1f3d	Fix enter second kernel thread. But page fault now.	2018-07-13 00:00:42 +08:00
WangRunji	b1a3695dfb	Prettify log output	2018-07-12 23:31:54 +08:00
WangRunji	4914d22f44	Update doc & README	2018-07-12 22:46:17 +08:00
WangRunji	f055ba7b23	Move kernel base to 0x80020000	2018-07-12 22:44:34 +08:00
WangRunji	7b4cc6d772	Fix log crate	2018-07-12 20:46:02 +08:00
WangRunji	96d8af8034	Use CowExt for RV32	2018-07-12 19:44:13 +08:00
WangRunji	7d856fe009	Fix memory::cow LLVM error for RV32	2018-07-12 19:35:21 +08:00
WangRunji	5530549a54	Recover process thread sync mod for RV32. Pass compile.	2018-07-12 18:56:29 +08:00
WangRunji	0b5c9c0c68	Print log level	2018-07-12 18:55:11 +08:00
WangRunji	42213081f5	Fix atomic_swap in core	2018-07-12 18:51:44 +08:00
WangRunji	7151c67c2a	Improve LocalKey	2018-07-12 17:19:55 +08:00
WangRunji	8ff40ea1dd	LocalKey / TLS support	2018-07-12 17:06:50 +08:00
WangRunji	7c7dbc9ded	Add CR3 to Context (x86_64)	2018-07-12 16:42:21 +08:00
WangRunji	548951abda	Forget the kernel MemorySet (x86_64)	2018-07-12 12:13:39 +08:00
WangRunji	e12c4c1ddb	Set global bit for kernel region (x86_64)	2018-07-12 12:12:28 +08:00
WangRunji	7f659950cb	Finish memory init	2018-07-12 02:09:41 +08:00
WangRunji	95ab3a2f3b	Allocate kernel stack from heap, remove stack allocator, remove guard page.	2018-07-12 00:33:43 +08:00
WangRunji	81ff6f13e5	Fix recursive mapping, finish kernel remap.	2018-07-11 23:43:28 +08:00
WangRunji	677c1bd565	Impl page table for RV32. TODO: Fix recursive mapping.	2018-07-11 21:37:42 +08:00
WangRunji	6b819d62e4	Fix core::sync::atomic::atomic_store ... It seems to generate an incorrect instruction (swap the dst and val in SW)	2018-07-11 21:35:21 +08:00
WangRunji	f7d75696bc	Move more to x86_64 arch	2018-07-11 10:57:07 +08:00
WangRunji	d3ed84ba61	Fix compile	2018-07-11 00:53:40 +08:00
WangRunji	aecb85d5e7	Move MemorySet out to memory crate	2018-07-10 21:54:16 +08:00
WangRunji	5c14673fe0	Setup a simple page table, enable paging.	2018-07-10 17:37:38 +08:00
WangRunji	b26fee1990	Make more mods common for both x86_64 & riscv32.	2018-07-10 17:07:03 +08:00
WangRunji	87b7ea523b	Experimental patch for core::sync::atomic on RISCV32I	2018-07-10 01:32:05 +08:00
WangRunji	a09be9cc40	Add doc for trap	2018-07-08 02:07:20 +08:00
WangRunji	ee242b44b2	Timer interrupt	2018-07-08 01:03:33 +08:00
WangRunji	aeb7fce0e6	SBI: Support RISCV64	2018-07-08 01:02:43 +08:00
WangRunji	02b94db859	Fix crate riscv version	2018-07-07 22:59:07 +08:00
WangRunji	da6dd763d7	Basic trap handler	2018-07-07 16:34:11 +08:00
WangRunji	4c1137a107	Make sure kern_entry at the beginning.	2018-07-07 16:21:08 +08:00
WangRunji	af0e90ca1c	Try to update travis	2018-07-06 23:23:02 +08:00
WangRunji	08777b1063	Add build guide.	2018-07-06 23:14:51 +08:00
WangRunji	aa22fcabde	Change target arch to RISCV32IMA. Recover some dependencies.	2018-07-06 23:02:10 +08:00
WangRunji	bf2ad7c6a5	Change target arch to RISCV32IMA. Recover some dependencies.	2018-07-06 22:33:28 +08:00
WangRunji	37564cb9fd	Change build target to riscv32ia_unknown_none	2018-07-06 01:24:35 +08:00
WangRunji	f571db5076	Fix kernel address	2018-07-05 23:56:45 +08:00
WangRunji	a44231435f	Fork crate riscv as a submodule	2018-07-05 14:17:30 +08:00
WangRunji	de7d9a1b71	Fix asm, can use pseudo ops.	2018-07-05 01:13:52 +08:00
WangRunji	1611bcb91f	Update dockerfile	2018-07-05 00:18:53 +08:00
WangRunji	ced765fb5b	New crate bbl, port sbi mod.	2018-07-04 22:04:59 +08:00
WangRunji	211aeff841	Add bbl as bootloader	2018-07-04 16:23:11 +08:00
WangRunji	5ccd84e934	Add riscv-pk from ucore_os_lab	2018-07-04 16:22:20 +08:00