Runji Wang
9c2459f2f0
update Rust nightly to 2020-01-17. remove dependence of cargo-xbuild.
2020-01-29 11:57:14 +08:00
Runji Wang
20f8b45888
riscv: rename 'arch/riscv32' to 'arch/riscv'
2019-11-30 15:48:12 +08:00
Runji Wang
7d1a37a7bf
update Rust nightly to 2019-11-28
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- disable hard float on mips to avoid LLVM error
- update smoltcp and fix drivers for API change
- update atomic.patch for libcore on riscv
- update rboot to fit new nightly
2019-11-30 15:48:09 +08:00
gjz010
7b8252eb1b
Basic loadable kernel module support, with a module template written in Rust.
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Under aarch64 and x86_64, hello_rust can be built and loaded by `/busybox insmod hello_rust.ko`.
2019-06-07 20:59:51 +08:00
Harry Chen
6544093dc6
Revert "Revert "Save/restore FP registers when context switching (broken mipsel arch)""
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This reverts commit b8f4ee2ce8
2019-05-14 00:11:22 +08:00
Harry Chen
b8f4ee2ce8
Revert "Save/restore FP registers when context switching (broken mipsel arch)"
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This reverts commit d261b4e0b3
2019-05-13 23:53:52 +08:00
Harry Chen
d261b4e0b3
Save/restore FP registers when context switching (broken mipsel arch)
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Signed-off-by: Harry Chen <i@harrychen.xyz>
2019-05-13 21:18:25 +08:00
equation314
03a8b3e449
aarch64: disable FP/SIMD registers again, update crates
2019-05-07 22:37:53 +08:00
Yuhao Zhou
a78916c57e
Add MIPS target.
2019-03-31 22:04:22 +08:00
Jiajie Chen
dd61ce30ba
Implement reading pci memory address
2019-02-25 21:18:09 +08:00
WangRunji
2303a8099b
update Rust compiler to support riscv64
2019-02-15 14:54:42 +08:00
Jiajie Chen
090796d3f0
Implement backtrace support for RISCV32
2019-01-08 12:05:29 +08:00
Jiajie Chen
7d6856ceab
Implement backtrace support for RISCV64
2019-01-08 11:33:31 +08:00
Jiajie Chen
d8edd1a7db
Implement backtrace support for AArch64
2019-01-08 11:05:28 +08:00
WangRunji
e46b6c7b0c
move target json. add kflash.py
2019-01-01 01:53:33 +08:00
