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mirror of https://github.com/rcore-os/rCore.git synced 2024-11-23 00:16:17 +04:00

Fix register naming in backtrace

Signed-off-by: Harry Chen <i@harrychen.xyz>
This commit is contained in:
Harry Chen 2019-04-06 00:55:08 +08:00
parent 7c20ebf6e0
commit f5227e28d3
2 changed files with 7 additions and 8 deletions

View File

@ -156,14 +156,13 @@ impl Context {
/// Push all callee-saved registers at the current kernel stack.
/// Store current sp, switch to target.
/// Pop all callee-saved registers, then return to the target.
#[naked]
#[inline(never)]
pub unsafe extern fn switch(&mut self, _target: &mut Self) {
extern {
fn switch_context(src : &mut Context, dst : &mut Context);
#[inline(always)]
pub unsafe fn switch(&mut self, target: &mut Self) {
extern "C" {
fn switch_context(src: *mut Context, dst: *mut Context);
}
switch_context(self, _target);
switch_context(self as *mut Context, target as *mut Context);
}
/// Constructs a null Context for the current running thread.

View File

@ -25,7 +25,7 @@ pub fn fp() -> usize {
#[cfg(any(target_arch = "mips"))]
unsafe {
// fp = $30
asm!("ori $0, $$$30, 0" : "=r"(ptr));
asm!("ori $0, $$30, 0" : "=r"(ptr));
}
ptr
@ -51,7 +51,7 @@ pub fn lr() -> usize {
#[cfg(target_arch = "mips")]
unsafe {
asm!("ori $0, $$$31, 0" : "=r"(ptr));
asm!("ori $0, $$31, 0" : "=r"(ptr));
}
ptr