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mirror of https://github.com/rcore-os/rCore.git synced 2024-11-22 16:16:16 +04:00

simplify including DTB file using include_bytes!()

This commit is contained in:
WangRunji 2019-07-24 18:55:43 +08:00
parent 08b59be1ae
commit f132e61c98
7 changed files with 17 additions and 51 deletions

View File

@ -16,19 +16,14 @@ fn main() {
gen_vector_asm().unwrap();
}
"riscv32" => {}
"riscv64" => {
if board == "rocket_chip" {
gen_dtb_asm(&String::from("riscv32"), &board).unwrap();
}
}
"mipsel" => {
gen_dtb_asm(&arch, &board).unwrap();
}
"riscv64" => {}
"mipsel" => {}
"aarch64" => {}
_ => panic!("Unknown arch {}", arch),
}
}
/// Generate assembly file for x86_64 trap vector
fn gen_vector_asm() -> Result<()> {
let mut f = File::create("src/arch/x86_64/interrupt/vector.asm").unwrap();
@ -52,32 +47,3 @@ fn gen_vector_asm() -> Result<()> {
}
Ok(())
}
fn gen_dtb_asm(arch: &String, _board: &String) -> Result<()> {
let dtb = std::env::var("DTB").unwrap();
if !Path::new(&dtb).is_file() {
panic!("DTB `{}` not found", dtb)
}
let mut f = File::create(format!("src/arch/{}/boot/dtb.gen.s", arch)).unwrap();
println!("cargo:rerun-if-changed={}", dtb);
println!("cargo:rerun-if-env-changed=DTB");
writeln!(f, "# generated by build.rs - do not edit")?;
write!(
f,
r#"
.section .dtb,"a"
.align 12
.global _dtb_start, _dtb_end
_dtb_start:
.incbin "{}"
_dtb_end:
"#,
dtb
)?;
Ok(())
}

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@ -14,6 +14,9 @@ pub mod vga;
use fb::FramebufferInfo;
/// Device tree bytes
pub static DTB: &'static [u8] = include_bytes!("device.dtb");
/// Initialize serial port first
pub fn init_serial_early() {
// initialize serial driver

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@ -8,6 +8,9 @@ pub mod fb;
#[path = "../../../../drivers/serial/16550_reg.rs"]
pub mod serial;
/// Device tree bytes
pub static DTB: &'static [u8] = include_bytes!("device.dtb");
/// Initialize serial port first
pub fn init_serial_early() {
serial::init(0xbfd003f8);

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@ -11,6 +11,9 @@ pub mod serial;
use fb::FramebufferInfo;
use fb::FramebufferResult;
/// Device tree bytes
pub static DTB: &'static [u8] = include_bytes!("device.dtb");
/// Initialize serial port first
pub fn init_serial_early() {
serial::init(0xa3000000);

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@ -24,18 +24,13 @@ pub mod board;
#[path = "board/mipssim/mod.rs"]
pub mod board;
extern "C" {
fn _dtb_start();
fn _dtb_end();
}
#[no_mangle]
pub extern "C" fn rust_main() -> ! {
// unsafe { cpu::set_cpu_id(hartid); }
let ebase = cp0::ebase::read_u32();
let cpu_id = ebase & 0x3ff;
let dtb_start = _dtb_start as usize;
let dtb_start = board::DTB.as_ptr() as usize;
if cpu_id != BOOT_CPU_ID {
// TODO: run others_main on other CPU
@ -79,4 +74,3 @@ const BOOT_CPU_ID: u32 = 0;
global_asm!(include_str!("boot/context.gen.s"));
global_asm!(include_str!("boot/entry.gen.s"));
global_asm!(include_str!("boot/trap.gen.s"));
global_asm!(include_str!("boot/dtb.gen.s"));

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@ -1,5 +1,8 @@
use crate::memory::phys_to_virt;
/// Device tree bytes
pub static DTB: &'static [u8] = include_bytes!("device.dtb");
/// Mask all external interrupt except serial.
pub unsafe fn init_external_interrupt() {
const HART0_S_MODE_INTERRUPT_ENABLES: *mut u64 = phys_to_virt(0x0C00_2080) as *mut u64;

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@ -34,11 +34,7 @@ pub extern "C" fn rust_main(hartid: usize, device_tree_paddr: usize) -> ! {
#[cfg(feature = "board_rocket_chip")]
{
extern "C" {
fn _dtb_start();
fn _dtb_end();
}
device_tree_vaddr = _dtb_start as usize;
device_tree_vaddr = board::DTB.as_ptr() as usize;
}
if hartid != BOOT_HART_ID {
@ -126,5 +122,3 @@ global_asm!(include_str!("boot/entry64.asm"));
#[cfg(feature = "board_k210")]
global_asm!(include_str!("boot/entry_k210.asm"));
global_asm!(include_str!("boot/trap.asm"));
#[cfg(feature = "board_rocket_chip")]
global_asm!(include_str!("boot/dtb.gen.s"));