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https://github.com/rcore-os/rCore.git
synced 2024-11-22 16:16:16 +04:00
simplify including DTB file using include_bytes!()
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08b59be1ae
commit
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@ -16,19 +16,14 @@ fn main() {
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gen_vector_asm().unwrap();
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}
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"riscv32" => {}
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"riscv64" => {
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if board == "rocket_chip" {
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gen_dtb_asm(&String::from("riscv32"), &board).unwrap();
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}
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}
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"mipsel" => {
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gen_dtb_asm(&arch, &board).unwrap();
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}
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"riscv64" => {}
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"mipsel" => {}
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"aarch64" => {}
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_ => panic!("Unknown arch {}", arch),
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}
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}
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/// Generate assembly file for x86_64 trap vector
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fn gen_vector_asm() -> Result<()> {
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let mut f = File::create("src/arch/x86_64/interrupt/vector.asm").unwrap();
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@ -52,32 +47,3 @@ fn gen_vector_asm() -> Result<()> {
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}
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Ok(())
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}
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fn gen_dtb_asm(arch: &String, _board: &String) -> Result<()> {
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let dtb = std::env::var("DTB").unwrap();
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if !Path::new(&dtb).is_file() {
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panic!("DTB `{}` not found", dtb)
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}
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let mut f = File::create(format!("src/arch/{}/boot/dtb.gen.s", arch)).unwrap();
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println!("cargo:rerun-if-changed={}", dtb);
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println!("cargo:rerun-if-env-changed=DTB");
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writeln!(f, "# generated by build.rs - do not edit")?;
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write!(
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f,
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r#"
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.section .dtb,"a"
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.align 12
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.global _dtb_start, _dtb_end
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_dtb_start:
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.incbin "{}"
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_dtb_end:
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"#,
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dtb
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)?;
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Ok(())
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}
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@ -14,6 +14,9 @@ pub mod vga;
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use fb::FramebufferInfo;
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/// Device tree bytes
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pub static DTB: &'static [u8] = include_bytes!("device.dtb");
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/// Initialize serial port first
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pub fn init_serial_early() {
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// initialize serial driver
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@ -8,6 +8,9 @@ pub mod fb;
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#[path = "../../../../drivers/serial/16550_reg.rs"]
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pub mod serial;
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/// Device tree bytes
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pub static DTB: &'static [u8] = include_bytes!("device.dtb");
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/// Initialize serial port first
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pub fn init_serial_early() {
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serial::init(0xbfd003f8);
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@ -11,6 +11,9 @@ pub mod serial;
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use fb::FramebufferInfo;
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use fb::FramebufferResult;
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/// Device tree bytes
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pub static DTB: &'static [u8] = include_bytes!("device.dtb");
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/// Initialize serial port first
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pub fn init_serial_early() {
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serial::init(0xa3000000);
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@ -24,18 +24,13 @@ pub mod board;
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#[path = "board/mipssim/mod.rs"]
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pub mod board;
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extern "C" {
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fn _dtb_start();
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fn _dtb_end();
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}
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#[no_mangle]
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pub extern "C" fn rust_main() -> ! {
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// unsafe { cpu::set_cpu_id(hartid); }
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let ebase = cp0::ebase::read_u32();
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let cpu_id = ebase & 0x3ff;
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let dtb_start = _dtb_start as usize;
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let dtb_start = board::DTB.as_ptr() as usize;
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if cpu_id != BOOT_CPU_ID {
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// TODO: run others_main on other CPU
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@ -79,4 +74,3 @@ const BOOT_CPU_ID: u32 = 0;
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global_asm!(include_str!("boot/context.gen.s"));
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global_asm!(include_str!("boot/entry.gen.s"));
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global_asm!(include_str!("boot/trap.gen.s"));
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global_asm!(include_str!("boot/dtb.gen.s"));
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@ -1,5 +1,8 @@
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use crate::memory::phys_to_virt;
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/// Device tree bytes
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pub static DTB: &'static [u8] = include_bytes!("device.dtb");
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/// Mask all external interrupt except serial.
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pub unsafe fn init_external_interrupt() {
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const HART0_S_MODE_INTERRUPT_ENABLES: *mut u64 = phys_to_virt(0x0C00_2080) as *mut u64;
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@ -34,11 +34,7 @@ pub extern "C" fn rust_main(hartid: usize, device_tree_paddr: usize) -> ! {
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#[cfg(feature = "board_rocket_chip")]
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{
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extern "C" {
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fn _dtb_start();
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fn _dtb_end();
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}
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device_tree_vaddr = _dtb_start as usize;
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device_tree_vaddr = board::DTB.as_ptr() as usize;
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}
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if hartid != BOOT_HART_ID {
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@ -126,5 +122,3 @@ global_asm!(include_str!("boot/entry64.asm"));
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#[cfg(feature = "board_k210")]
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global_asm!(include_str!("boot/entry_k210.asm"));
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global_asm!(include_str!("boot/trap.asm"));
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#[cfg(feature = "board_rocket_chip")]
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global_asm!(include_str!("boot/dtb.gen.s"));
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