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runs without pagefault but does not reach end of remap_kernel

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This commit is contained in:
dzy 2018-12-26 14:03:23 +08:00
parent a4348428a6
commit ccee527272
3 changed files with 6 additions and 11 deletions
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2
kernel/run-qemu-script-custom-llc
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@ -25,7 +25,7 @@ if [[ ${RV32} = 1 ]]; then
UCORE_USER_IMAGE="../user/img/ucore-rv32.img" UCORE_USER_IMAGE="../user/img/ucore-rv32.img"
else else
TARGET_ARCH=riscv64 TARGET_ARCH=riscv64
export LOG=trace export LOG=warn
COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -O3" COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -O3"
SFSIMG_CFLAGS="-march=rv64ia -mabi=lp64" SFSIMG_CFLAGS="-march=rv64ia -mabi=lp64"
RISCV_PK_CONFIGURE_FLAGS="--with-arch=rv64imac --disable-fp-emulation --host=riscv64-unknown-elf" RISCV_PK_CONFIGURE_FLAGS="--with-arch=rv64imac --disable-fp-emulation --host=riscv64-unknown-elf"

4
kernel/src/arch/riscv32/memory.rs
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@ -91,7 +91,7 @@ fn remap_the_kernel() {
#[cfg(all(target_arch = "riscv64", not(feature = "no_mmu")))] #[cfg(all(target_arch = "riscv64", not(feature = "no_mmu")))]
fn remap_the_kernel() { fn remap_the_kernel() {
info!("remap the kernel begin, satp: {:x}", satp::read().bits()); error!("remap the kernel begin, satp: {:x}", satp::read().bits());
let mut ms = MemorySet::new_bare(); let mut ms = MemorySet::new_bare();
info!("ms new bare"); info!("ms new bare");
#[cfg(feature = "no_bbl")] #[cfg(feature = "no_bbl")]
@ -111,7 +111,7 @@ fn remap_the_kernel() {
unsafe { SATP = ms.token(); } unsafe { SATP = ms.token(); }
info!("satp token ok"); info!("satp token ok");
mem::forget(ms); mem::forget(ms);
info!("kernel remap end"); error!("kernel remap end");
} }
// First core stores its SATP here. // First core stores its SATP here.

11
kernel/src/arch/riscv32/paging.rs
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@ -281,16 +281,11 @@ impl ActivePageTable {
/// implementation for the Entry trait in /crate/memory/src/paging/mod.rs /// implementation for the Entry trait in /crate/memory/src/paging/mod.rs
impl Entry for PageEntry { impl Entry for PageEntry {
// TODO: merge below two
#[cfg(target_arch = "riscv64")] #[cfg(target_arch = "riscv64")]
fn update(&mut self) { fn update(&mut self) {
assert!(false, "can't update"); edit_entry_of(&self.1, |entry| *entry = self.0);
let mut addr: usize = (self as *const _ as usize) << 9; sfence_vma(0, self.1.start_address());
if (addr & 0x7000_0000_0000 != 0) {
addr |= 0xFFFF_0000_0000_0000;
} else {
addr &= 0x0000_FFFF_FFFF_FFFF;
}
sfence_vma(0, VirtAddr::new(addr));
} }
#[cfg(target_arch = "riscv32")] #[cfg(target_arch = "riscv32")]
fn update(&mut self) { fn update(&mut self) {