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Fix RV32 multi-core: Setup page table for other cores.

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This commit is contained in:
WangRunji 2018-11-02 16:09:39 +08:00
parent e5a196c00f
commit ba4a24ba3b
2 changed files with 15 additions and 3 deletions
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17
kernel/src/arch/riscv32/memory.rs
View File

@ -1,4 +1,4 @@
use core::slice;
use core::{slice, mem};
use memory::{active_table, FRAME_ALLOCATOR, init_heap, MemoryArea, MemoryAttr, MemorySet};
use super::riscv::{addr::*, register::sstatus};
use ucore_memory::PAGE_SIZE;
@ -16,6 +16,13 @@ pub fn init() {
remap_the_kernel();
}
pub fn init_other() {
unsafe {
sstatus::set_sum(); // Allow user memory access
asm!("csrw 0x180, $0; sfence.vma" :: "r"(SATP) :: "volatile");
}
}
fn init_frame_allocator() {
use bit_allocator::BitAlloc;
use core::ops::Range;
@ -42,11 +49,15 @@ fn remap_the_kernel() {
ms.push(MemoryArea::new_identity(srodata as usize, erodata as usize, MemoryAttr::default().readonly(), "rodata"));
ms.push(MemoryArea::new_identity(sbss as usize, ebss as usize, MemoryAttr::default(), "bss"));
unsafe { ms.activate(); }
use core::mem::forget;
forget(ms);
unsafe { SATP = ms.token(); }
mem::forget(ms);
info!("kernel remap end");
}
// First core stores its SATP here.
// Other cores load it later.
static mut SATP: usize = 0;
// Symbols provided by linker script
extern {
fn stext();

1
kernel/src/arch/riscv32/mod.rs
View File

@ -35,6 +35,7 @@ pub extern fn rust_main(hartid: usize, dtb: usize, hart_mask: usize) -> ! {
fn others_main() -> ! {
interrupt::init();
memory::init_other();
timer::init();
::kmain();
}