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aarch64: fix A1 field in TCR_EL1 register

This commit is contained in:
equation314 2019-03-29 19:57:01 +08:00
parent 236ddd0827
commit b8d91965e7

View File

@ -75,7 +75,7 @@ fn enable_mmu() {
TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable +
TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable +
TCR_EL1::EPD1::EnableTTBR1Walks + TCR_EL1::EPD1::EnableTTBR1Walks +
TCR_EL1::A1::UseTTBR1ASID + TCR_EL1::A1::UseTTBR0ASID +
TCR_EL1::T1SZ.val(16) + TCR_EL1::T1SZ.val(16) +
TCR_EL1::TG0::KiB_4 + TCR_EL1::TG0::KiB_4 +