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Fix register size (4->XLEN) in trap handling.
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@ -17,39 +17,39 @@ _restore_kernel_sp:
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# sscratch = previous-sp, sp = kernel-sp
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_save_context:
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# provide room for trap frame
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addi sp, sp, -36 * 4
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addi sp, sp, -36 * XLENB
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# save x registers except x2 (sp)
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sw x1, 1*4(sp)
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sw x3, 3*4(sp)
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sw x1, 1*XLENB(sp)
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sw x3, 3*XLENB(sp)
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# tp(x4) = hartid. DON'T change.
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# sw x4, 4*4(sp)
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sw x5, 5*4(sp)
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sw x6, 6*4(sp)
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sw x7, 7*4(sp)
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sw x8, 8*4(sp)
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sw x9, 9*4(sp)
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sw x10, 10*4(sp)
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sw x11, 11*4(sp)
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sw x12, 12*4(sp)
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sw x13, 13*4(sp)
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sw x14, 14*4(sp)
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sw x15, 15*4(sp)
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sw x16, 16*4(sp)
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sw x17, 17*4(sp)
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sw x18, 18*4(sp)
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sw x19, 19*4(sp)
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sw x20, 20*4(sp)
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sw x21, 21*4(sp)
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sw x22, 22*4(sp)
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sw x23, 23*4(sp)
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sw x24, 24*4(sp)
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sw x25, 25*4(sp)
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sw x26, 26*4(sp)
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sw x27, 27*4(sp)
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sw x28, 28*4(sp)
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sw x29, 29*4(sp)
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sw x30, 30*4(sp)
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sw x31, 31*4(sp)
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# sw x4, 4*XLENB(sp)
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sw x5, 5*XLENB(sp)
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sw x6, 6*XLENB(sp)
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sw x7, 7*XLENB(sp)
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sw x8, 8*XLENB(sp)
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sw x9, 9*XLENB(sp)
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sw x10, 10*XLENB(sp)
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sw x11, 11*XLENB(sp)
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sw x12, 12*XLENB(sp)
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sw x13, 13*XLENB(sp)
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sw x14, 14*XLENB(sp)
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sw x15, 15*XLENB(sp)
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sw x16, 16*XLENB(sp)
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sw x17, 17*XLENB(sp)
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sw x18, 18*XLENB(sp)
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sw x19, 19*XLENB(sp)
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sw x20, 20*XLENB(sp)
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sw x21, 21*XLENB(sp)
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sw x22, 22*XLENB(sp)
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sw x23, 23*XLENB(sp)
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sw x24, 24*XLENB(sp)
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sw x25, 25*XLENB(sp)
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sw x26, 26*XLENB(sp)
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sw x27, 27*XLENB(sp)
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sw x28, 28*XLENB(sp)
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sw x29, 29*XLENB(sp)
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sw x30, 30*XLENB(sp)
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sw x31, 31*XLENB(sp)
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# get sp, sstatus, sepc, stval, scause
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# set sscratch = 0
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@ -59,20 +59,20 @@ _save_context:
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csrr s3, (xtval)
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csrr s4, (xcause)
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# store sp, sstatus, sepc, sbadvaddr, scause
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sw s0, 2*4(sp)
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sw s1, 32*4(sp)
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sw s2, 33*4(sp)
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sw s3, 34*4(sp)
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sw s4, 35*4(sp)
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sw s0, 2*XLENB(sp)
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sw s1, 32*XLENB(sp)
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sw s2, 33*XLENB(sp)
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sw s3, 34*XLENB(sp)
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sw s4, 35*XLENB(sp)
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.endm
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.macro RESTORE_ALL
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lw s1, 32*4(sp) # s1 = sstatus
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lw s2, 33*4(sp) # s2 = sepc
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lw s1, 32*XLENB(sp) # s1 = sstatus
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lw s2, 33*XLENB(sp) # s2 = sepc
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andi s0, s1, 1 << 8
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bnez s0, _restore_context # back to S-mode? (sstatus.SPP = 1)
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_save_kernel_sp:
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addi s0, sp, 36*4
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addi s0, sp, 36*XLENB
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csrw (xscratch), s0 # sscratch = kernel-sp
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_restore_context:
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# restore sstatus, sepc
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@ -80,38 +80,38 @@ _restore_context:
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csrw (xepc), s2
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# restore x registers except x2 (sp)
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lw x1, 1*4(sp)
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lw x3, 3*4(sp)
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# lw x4, 4*4(sp)
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lw x5, 5*4(sp)
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lw x6, 6*4(sp)
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lw x7, 7*4(sp)
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lw x8, 8*4(sp)
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lw x9, 9*4(sp)
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lw x10, 10*4(sp)
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lw x11, 11*4(sp)
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lw x12, 12*4(sp)
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lw x13, 13*4(sp)
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lw x14, 14*4(sp)
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lw x15, 15*4(sp)
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lw x16, 16*4(sp)
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lw x17, 17*4(sp)
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lw x18, 18*4(sp)
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lw x19, 19*4(sp)
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lw x20, 20*4(sp)
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lw x21, 21*4(sp)
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lw x22, 22*4(sp)
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lw x23, 23*4(sp)
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lw x24, 24*4(sp)
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lw x25, 25*4(sp)
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lw x26, 26*4(sp)
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lw x27, 27*4(sp)
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lw x28, 28*4(sp)
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lw x29, 29*4(sp)
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lw x30, 30*4(sp)
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lw x31, 31*4(sp)
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lw x1, 1*XLENB(sp)
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lw x3, 3*XLENB(sp)
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# lw x4, 4*XLENB(sp)
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lw x5, 5*XLENB(sp)
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lw x6, 6*XLENB(sp)
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lw x7, 7*XLENB(sp)
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lw x8, 8*XLENB(sp)
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lw x9, 9*XLENB(sp)
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lw x10, 10*XLENB(sp)
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lw x11, 11*XLENB(sp)
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lw x12, 12*XLENB(sp)
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lw x13, 13*XLENB(sp)
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lw x14, 14*XLENB(sp)
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lw x15, 15*XLENB(sp)
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lw x16, 16*XLENB(sp)
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lw x17, 17*XLENB(sp)
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lw x18, 18*XLENB(sp)
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lw x19, 19*XLENB(sp)
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lw x20, 20*XLENB(sp)
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lw x21, 21*XLENB(sp)
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lw x22, 22*XLENB(sp)
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lw x23, 23*XLENB(sp)
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lw x24, 24*XLENB(sp)
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lw x25, 25*XLENB(sp)
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lw x26, 26*XLENB(sp)
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lw x27, 27*XLENB(sp)
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lw x28, 28*XLENB(sp)
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lw x29, 29*XLENB(sp)
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lw x30, 30*XLENB(sp)
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lw x31, 31*XLENB(sp)
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# restore sp last
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lw x2, 2*4(sp)
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lw x2, 2*XLENB(sp)
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.endm
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.section .text
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@ -49,6 +49,7 @@ int __atomic_fetch_sub_4(int* ptr, int val) {
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return res;
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}
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#ifdef TARGET_IS_64BITS
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typedef unsigned long long u64;
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u64 __atomic_load_8(u64 *src) {
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@ -87,3 +88,4 @@ u64 __atomic_fetch_sub_8(u64* ptr, u64 val) {
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__asm__ __volatile__("amoadd.d.rl %0, %1, (%2)" : "=r"(res) : "r"(-val), "r"(ptr) : "memory");
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return res;
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}
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#endif
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@ -63,6 +63,18 @@ global_asm!("
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.macro XRET\n sret\n .endm
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");
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#[cfg(target_pointer_width = "32")]
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global_asm!("
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.equ XLENB, 4
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.equ XLENb, 32
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");
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#[cfg(target_pointer_width = "64")]
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global_asm!("
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.equ XLENB, 8
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.equ XLENb, 64
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");
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#[cfg(feature = "board_k210")]
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global_asm!(include_str!("boot/boot_k210.asm"));
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global_asm!(include_str!("boot/entry.asm"));
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