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Setup x87 FPU control word correctly

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This commit is contained in:
Jiajie Chen 2020-06-29 23:21:11 +08:00
parent e32597ac82
commit 71015ef63c
2 changed files with 11 additions and 2 deletions
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3
kernel/src/arch/x86_64/cpu.rs
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@ -43,10 +43,13 @@ pub fn init() {
// enable FPU, the manual Volume 3 Chapter 13 // enable FPU, the manual Volume 3 Chapter 13
unsafe { unsafe {
Cr4::update(|cr4| { Cr4::update(|cr4| {
// enable fxsave/fxrstor
cr4.insert(Cr4Flags::OSFXSR); cr4.insert(Cr4Flags::OSFXSR);
// sse
cr4.insert(Cr4Flags::OSXMMEXCPT_ENABLE); cr4.insert(Cr4Flags::OSXMMEXCPT_ENABLE);
}); });
Cr0::update(|cr0| { Cr0::update(|cr0| {
// enable fpu
cr0.remove(Cr0Flags::EMULATE_COPROCESSOR); cr0.remove(Cr0Flags::EMULATE_COPROCESSOR);
cr0.insert(Cr0Flags::MONITOR_COPROCESSOR); cr0.insert(Cr0Flags::MONITOR_COPROCESSOR);
}); });

10
kernel/src/arch/x86_64/fp.rs
View File

@ -5,7 +5,10 @@
#[derive(Debug, Copy, Clone, Default)] #[derive(Debug, Copy, Clone, Default)]
pub struct FpState { pub struct FpState {
// 0 // 0
word1: u64, fcw: u16,
fsw: u16,
ftw: u16,
fop: u16,
word2: u64, word2: u64,
// 16 // 16
word3: u64, word3: u64,
@ -23,8 +26,11 @@ impl FpState {
pub fn new() -> Self { pub fn new() -> Self {
assert!(core::mem::size_of::<Self>() == 512); assert!(core::mem::size_of::<Self>() == 512);
Self { Self {
// default value // default values
// intel manual 11.6.4 Initialization of SSE/SSE2 Extensions
mxcsr: 0x1f80, mxcsr: 0x1f80,
// intel manual 8.1.5 x87 FPU Control Word
fcw: 0x03f7,
..Self::default() ..Self::default()
} }
} }