Complete DTS for qemu-malta

Signed-off-by: Harry Chen <i@harrychen.xyz>

.gitignore

@@ -1,6 +1,8 @@
 build
 target
 /kernel/src/arch/x86_64/interrupt/vector.asm
+/kernel/src/arch/*/boot/dtb.S
+*.dtb
 
 Cargo.lock
 !kernel/Cargo.lock

kernel/Cargo.toml

@@ -24,6 +24,8 @@ board_u540 = ["sv39", "link_user"]
 nographic = []
 board_raspi3 = ["bcm2837", "link_user"]
 raspi3_use_generic_timer = ["bcm2837/use_generic_timer"]
+# for mipsel qemu malta machine
+board_malta = []
 # Hard link user program
 link_user = []
 # Run cmdline instead of user shell, useful for automatic testing

kernel/Makefile

@@ -115,7 +115,7 @@ qemu_opts += \
 else ifeq ($(arch), mipsel)
 qemu_opts += \
 	-machine $(board) \
-	-serial null -serial mon:stdio \
+	-serial null -serial null -serial mon:stdio \
 	-kernel $(kernel_img)
 endif
 

kernel/src/arch/mipsel/boot/dts/malta.dts

@@ -0,0 +1,44 @@
+/dts-v1/;
+
+
+/ {
+	model = "qemu malta";
+	compatible = "qemu,malta";
+    #address-cells = <1>;
+    #size-cells = <1>;
+
+	chosen {
+		stdio = &uart2;
+	};
+
+    aliases { };
+
+    cpu_intc: interrupt-controller {
+		compatible = "mti,cpu-interrupt-controller";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	main_memory: memory@0 {
+        device_type = "memory";
+		reg = <0x00000000 0x10000000>;
+	};
+
+	uart2: serial@bf000900 {
+		compatible = "ns16550a";
+		reg = <0xbf000900 0x40>;
+		reg-shift = <3>;
+		clock-frequency = <1843200>;
+        /* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
+        interrupt-parent = <&cpu_intc>;
+        interrupts = <4>;
+	};
+
+	nor0: flash@be000000 {
+		compatible = "cfi-flash";
+		reg = <0xbe000000 0x00400000>;
+	};
+
+    // TODO: add graphics and ethernet adapter
+
+};