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try to fix interrupt & deadlock on RV32
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46f0e85230
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@ -10,8 +10,8 @@ pub unsafe fn disable_and_store() -> usize {
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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pub unsafe fn disable_and_store() -> usize {
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pub unsafe fn disable_and_store() -> usize {
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let sstatus: usize;
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let sstatus: usize;
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asm!("csrrci $0, 0x100, 1" : "=r"(sstatus));
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asm!("csrrci $0, 0x100, 2" : "=r"(sstatus));
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sstatus & 1
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sstatus & 2
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}
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}
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#[inline(always)]
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#[inline(always)]
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@ -92,7 +92,10 @@ impl Processor {
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}
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}
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pub fn tick(&self) {
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pub fn tick(&self) {
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let flags = unsafe { interrupt::disable_and_store() };
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let need_reschedule = self.manager().tick(self.pid());
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let need_reschedule = self.manager().tick(self.pid());
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unsafe { interrupt::restore(flags); }
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if need_reschedule {
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if need_reschedule {
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self.yield_now();
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self.yield_now();
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}
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}
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@ -1,6 +1,6 @@
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use core::fmt;
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use core::fmt;
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use log::{self, Level, LevelFilter, Log, Metadata, Record};
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use log::{self, Level, LevelFilter, Log, Metadata, Record};
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use spin::Mutex;
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use crate::sync::SpinNoIrqLock as Mutex;
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use lazy_static::lazy_static;
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use lazy_static::lazy_static;
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lazy_static! {
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lazy_static! {
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