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mirror of https://github.com/rcore-os/rCore.git synced 2024-11-22 16:16:16 +04:00

Format code and use rust/sh for rocket chip shell

This commit is contained in:
Jiajie Chen 2019-05-08 20:53:18 +08:00
parent c88c0193d4
commit 2adbc4dcd9
8 changed files with 38 additions and 38 deletions

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@ -19,7 +19,6 @@ pub unsafe fn init_external_interrupt() {
// enable all interrupts
AXI_INTC_IER.write_volatile(0xffffffff);
}
/// Claim and complete external interrupt by reading and writing to
@ -43,4 +42,4 @@ pub unsafe fn enable_serial_interrupt() {
// Intr enable | rx reset | tx reset
const UART_IE: u32 = 0x13;
SERIAL_BASE.add(UART_CTRL_REG).write_volatile(UART_IE);
}
}

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@ -30,7 +30,6 @@ pub extern "C" fn rust_main(hartid: usize, device_tree_paddr: usize) -> ! {
unsafe {
cpu::set_cpu_id(hartid);
}
#[cfg(feature = "board_rocket_chip")]

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@ -1,3 +1,6 @@
#[cfg(any(target_arch = "x86_64", all(target_arch = "mips", feature = "board_malta")))]
#[cfg(any(
target_arch = "x86_64",
all(target_arch = "mips", feature = "board_malta")
))]
pub mod pci;
pub mod virtio_mmio;

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@ -37,4 +37,4 @@ pub const FIOCLEX: usize = 0x6601;
// rustc using pipe and ioctl pipe file with this request id
// for non-blocking/blocking IO control setting
pub const FIONBIO: usize = 0x5421;
pub const FIONBIO: usize = 0x5421;

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@ -13,19 +13,19 @@
//! mipssim/malta(MIPS) -- 10MB
use super::HEAP_ALLOCATOR;
use core::mem;
pub use crate::arch::paging::*;
use crate::consts::{KERNEL_OFFSET, MEMORY_OFFSET};
use crate::process::current_thread;
use crate::sync::SpinNoIrqLock;
use alloc::boxed::Box;
use bitmap_allocator::BitAlloc;
use buddy_system_allocator::Heap;
use core::mem;
use lazy_static::*;
use log::*;
pub use rcore_memory::memory_set::{handler::*, MemoryArea, MemoryAttr};
use rcore_memory::paging::PageTable;
use rcore_memory::*;
use crate::process::current_thread;
pub type MemorySet = rcore_memory::memory_set::MemorySet<InactivePageTable0>;

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@ -18,8 +18,13 @@ pub fn add_user_shell() {
// let init_shell="/bin/busybox"; // from alpine linux
//
// #[cfg(not(target_arch = "x86_64"))]
#[cfg(not(feature = "board_rocket_chip"))]
let init_shell = "/busybox"; //from docker-library
// fd is not available on rocket chip
#[cfg(feature = "board_rocket_chip")]
let init_shell = "/rust/sh";
#[cfg(target_arch = "x86_64")]
let init_envs =
vec!["PATH=/usr/sbin:/usr/bin:/sbin:/bin:/usr/x86_64-alpine-linux-musl/bin".into()];

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@ -132,6 +132,14 @@ impl Syscall<'_> {
SYS_DUP3 => self.sys_dup2(args[0], args[1]), // TODO: handle `flags`
SYS_PIPE2 => self.sys_pipe(args[0] as *mut u32), // TODO: handle `flags`
SYS_UTIMENSAT => self.unimplemented("utimensat", Ok(0)),
SYS_COPY_FILE_RANGE => self.sys_copy_file_range(
args[0],
args[1] as *mut usize,
args[2],
args[3] as *mut usize,
args[4],
args[5],
),
// io multiplexing
SYS_PPOLL => {
@ -231,6 +239,7 @@ impl Syscall<'_> {
args[2] as i32,
args[3] as *const TimeSpec,
),
SYS_TKILL => self.unimplemented("tkill", Ok(0)),
// time
SYS_NANOSLEEP => self.sys_nanosleep(args[0] as *const TimeSpec),
@ -276,25 +285,15 @@ impl Syscall<'_> {
args[2] as u32,
args[3] as *const u8,
),
SYS_COPY_FILE_RANGE => self.sys_copy_file_range(
args[0],
args[1] as *mut usize,
args[2],
args[3] as *mut usize,
args[4],
args[5],
),
SYS_GETRANDOM => {
self.sys_getrandom(args[0] as *mut u8, args[1] as usize, args[2] as u32)
}
// custom
SYS_MAP_PCI_DEVICE => self.sys_map_pci_device(args[0], args[1]),
SYS_GET_PADDR => {
self.sys_get_paddr(args[0] as *const u64, args[1] as *mut u64, args[2])
}
//SYS_GETRANDOM => self.unimplemented("getrandom", Err(SysError::EINVAL)),
SYS_GETRANDOM => {
self.sys_getrandom(args[0] as *mut u8, args[1] as usize, args[2] as u32)
}
SYS_TKILL => self.unimplemented("tkill", Ok(0)),
_ => {
let ret = match () {
#[cfg(target_arch = "x86_64")]

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@ -185,7 +185,11 @@ impl Syscall<'_> {
iovs.write_all_from_slice(&buf[..len]);
let sockaddr_in = SockAddr::from(endpoint);
unsafe {
sockaddr_in.write_to(&mut self.vm(), hdr.msg_name, &mut hdr.msg_namelen as *mut u32)?;
sockaddr_in.write_to(
&mut self.vm(),
hdr.msg_name,
&mut hdr.msg_namelen as *mut u32,
)?;
}
}
result
@ -427,17 +431,13 @@ fn sockaddr_to_endpoint(
Ok(Endpoint::Ip((addr, port).into()))
}
AddressFamily::Unix => Err(SysError::EINVAL),
AddressFamily::Packet => {
Ok(Endpoint::LinkLevel(LinkLevelEndpoint::new(
addr.addr_ll.sll_ifindex as usize,
)))
}
AddressFamily::Netlink => {
Ok(Endpoint::Netlink(NetlinkEndpoint::new(
addr.addr_nl.nl_pid,
addr.addr_nl.nl_groups,
)))
}
AddressFamily::Packet => Ok(Endpoint::LinkLevel(LinkLevelEndpoint::new(
addr.addr_ll.sll_ifindex as usize,
))),
AddressFamily::Netlink => Ok(Endpoint::Netlink(NetlinkEndpoint::new(
addr.addr_nl.nl_pid,
addr.addr_nl.nl_groups,
))),
_ => Err(SysError::EINVAL),
}
}
@ -456,12 +456,7 @@ impl SockAddr {
/// Write to user sockaddr
/// Check mutability for user
unsafe fn write_to(
self,
vm: &MemorySet,
addr: *mut SockAddr,
addr_len: *mut u32,
) -> SysResult {
unsafe fn write_to(self, vm: &MemorySet, addr: *mut SockAddr, addr_len: *mut u32) -> SysResult {
// Ignore NULL
if addr.is_null() {
return Ok(0);