Add boards/ && cargo clippy

This commit is contained in:
Yifan Wu 2022-01-24 23:09:54 -08:00
parent 91710ba1a5
commit 7408b1a7b2
18 changed files with 87 additions and 85 deletions

23
os/src/boards/k210.rs Normal file
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@ -0,0 +1,23 @@
pub const CLOCK_FREQ: usize = 403000000 / 62;
pub const MMIO: &[(usize, usize)] = &[
// we don't need clint in S priv when running
// we only need claim/complete for target0 after initializing
(0x0C00_0000, 0x3000), /* PLIC */
(0x0C20_0000, 0x1000), /* PLIC */
(0x3800_0000, 0x1000), /* UARTHS */
(0x3800_1000, 0x1000), /* GPIOHS */
(0x5020_0000, 0x1000), /* GPIO */
(0x5024_0000, 0x1000), /* SPI_SLAVE */
(0x502B_0000, 0x1000), /* FPIOA */
(0x502D_0000, 0x1000), /* TIMER0 */
(0x502E_0000, 0x1000), /* TIMER1 */
(0x502F_0000, 0x1000), /* TIMER2 */
(0x5044_0000, 0x1000), /* SYSCTL */
(0x5200_0000, 0x1000), /* SPI0 */
(0x5300_0000, 0x1000), /* SPI1 */
(0x5400_0000, 0x1000), /* SPI2 */
];
pub type BlockDeviceImpl = crate::drivers::block::SDCardWrapper;

6
os/src/boards/qemu.rs Normal file
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@ -0,0 +1,6 @@
pub const CLOCK_FREQ: usize = 12500000;
pub const MMIO: &[(usize, usize)] = &[(0x10001000, 0x1000)];
pub type BlockDeviceImpl = crate::drivers::block::VirtIOBlock;

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@ -10,31 +10,5 @@ pub const PAGE_SIZE_BITS: usize = 0xc;
pub const TRAMPOLINE: usize = usize::MAX - PAGE_SIZE + 1; pub const TRAMPOLINE: usize = usize::MAX - PAGE_SIZE + 1;
pub const TRAP_CONTEXT: usize = TRAMPOLINE - PAGE_SIZE; pub const TRAP_CONTEXT: usize = TRAMPOLINE - PAGE_SIZE;
#[cfg(feature = "board_k210")] pub use crate::board::{CLOCK_FREQ, MMIO};
pub const CLOCK_FREQ: usize = 403000000 / 62;
#[cfg(feature = "board_qemu")]
pub const CLOCK_FREQ: usize = 12500000;
#[cfg(feature = "board_qemu")]
pub const MMIO: &[(usize, usize)] = &[(0x10001000, 0x1000)];
#[cfg(feature = "board_k210")]
pub const MMIO: &[(usize, usize)] = &[
// we don't need clint in S priv when running
// we only need claim/complete for target0 after initializing
(0x0C00_0000, 0x3000), /* PLIC */
(0x0C20_0000, 0x1000), /* PLIC */
(0x3800_0000, 0x1000), /* UARTHS */
(0x3800_1000, 0x1000), /* GPIOHS */
(0x5020_0000, 0x1000), /* GPIO */
(0x5024_0000, 0x1000), /* SPI_SLAVE */
(0x502B_0000, 0x1000), /* FPIOA */
(0x502D_0000, 0x1000), /* TIMER0 */
(0x502E_0000, 0x1000), /* TIMER1 */
(0x502F_0000, 0x1000), /* TIMER2 */
(0x5044_0000, 0x1000), /* SYSCTL */
(0x5200_0000, 0x1000), /* SPI0 */
(0x5300_0000, 0x1000), /* SPI1 */
(0x5400_0000, 0x1000), /* SPI2 */
];

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@ -1,15 +1,13 @@
mod sdcard; mod sdcard;
mod virtio_blk; mod virtio_blk;
pub use virtio_blk::VirtIOBlock;
pub use sdcard::SDCardWrapper;
use alloc::sync::Arc; use alloc::sync::Arc;
use easy_fs::BlockDevice; use easy_fs::BlockDevice;
use lazy_static::*; use lazy_static::*;
use crate::board::BlockDeviceImpl;
#[cfg(feature = "board_qemu")]
type BlockDeviceImpl = virtio_blk::VirtIOBlock;
#[cfg(feature = "board_k210")]
type BlockDeviceImpl = sdcard::SDCardWrapper;
lazy_static! { lazy_static! {
pub static ref BLOCK_DEVICE: Arc<dyn BlockDevice> = Arc::new(BlockDeviceImpl::new()); pub static ref BLOCK_DEVICE: Arc<dyn BlockDevice> = Arc::new(BlockDeviceImpl::new());

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@ -314,7 +314,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
timeout -= 1; timeout -= 1;
} }
/* After time out */ /* After time out */
return 0xFF; 0xFF
} }
/* /*
@ -341,7 +341,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
self.read_data(response); self.read_data(response);
} }
/* Return response */ /* Return response */
return 0; 0
} }
/* /*
@ -371,7 +371,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
self.read_data(&mut csd_tab); self.read_data(&mut csd_tab);
self.end_cmd(); self.end_cmd();
/* see also: https://cdn-shop.adafruit.com/datasheets/TS16GUSDHC6.pdf */ /* see also: https://cdn-shop.adafruit.com/datasheets/TS16GUSDHC6.pdf */
return Ok(SDCardCSD { Ok(SDCardCSD {
/* Byte 0 */ /* Byte 0 */
CSDStruct: (csd_tab[0] & 0xC0) >> 6, CSDStruct: (csd_tab[0] & 0xC0) >> 6,
SysSpecVersion: (csd_tab[0] & 0x3C) >> 2, SysSpecVersion: (csd_tab[0] & 0x3C) >> 2,
@ -424,7 +424,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
CSD_CRC: (csd_tab[15] & 0xFE) >> 1, CSD_CRC: (csd_tab[15] & 0xFE) >> 1,
Reserved4: 1, Reserved4: 1,
/* Return the reponse */ /* Return the reponse */
}); })
} }
/* /*
@ -453,7 +453,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
/* Get CRC bytes (not really needed by us, but required by SD) */ /* Get CRC bytes (not really needed by us, but required by SD) */
self.read_data(&mut cid_tab); self.read_data(&mut cid_tab);
self.end_cmd(); self.end_cmd();
return Ok(SDCardCID { Ok(SDCardCID {
/* Byte 0 */ /* Byte 0 */
ManufacturerID: cid_tab[0], ManufacturerID: cid_tab[0],
/* Byte 1, 2 */ /* Byte 1, 2 */
@ -478,7 +478,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
/* Byte 15 */ /* Byte 15 */
CID_CRC: (cid_tab[15] & 0xFE) >> 1, CID_CRC: (cid_tab[15] & 0xFE) >> 1,
Reserved2: 1, Reserved2: 1,
}); })
} }
/* /*
@ -684,7 +684,7 @@ impl</*'a,*/ X: SPI> SDCard</*'a,*/ X> {
*a = b; *a = b;
} }
//self.write_data_dma(&mut dma_chunk); //self.write_data_dma(&mut dma_chunk);
self.write_data(&mut tmp_chunk); self.write_data(&tmp_chunk);
/* Put dummy CRC bytes */ /* Put dummy CRC bytes */
self.write_data(&[0xff, 0xff]); self.write_data(&[0xff, 0xff]);
/* Read data response */ /* Read data response */

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@ -1,3 +1,3 @@
mod block; pub mod block;
pub use block::BLOCK_DEVICE; pub use block::BLOCK_DEVICE;

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@ -32,9 +32,9 @@ const RING_BUFFER_SIZE: usize = 32;
#[derive(Copy, Clone, PartialEq)] #[derive(Copy, Clone, PartialEq)]
enum RingBufferStatus { enum RingBufferStatus {
FULL, Full,
EMPTY, Empty,
NORMAL, Normal,
} }
pub struct PipeRingBuffer { pub struct PipeRingBuffer {
@ -51,7 +51,7 @@ impl PipeRingBuffer {
arr: [0; RING_BUFFER_SIZE], arr: [0; RING_BUFFER_SIZE],
head: 0, head: 0,
tail: 0, tail: 0,
status: RingBufferStatus::EMPTY, status: RingBufferStatus::Empty,
write_end: None, write_end: None,
} }
} }
@ -59,24 +59,24 @@ impl PipeRingBuffer {
self.write_end = Some(Arc::downgrade(write_end)); self.write_end = Some(Arc::downgrade(write_end));
} }
pub fn write_byte(&mut self, byte: u8) { pub fn write_byte(&mut self, byte: u8) {
self.status = RingBufferStatus::NORMAL; self.status = RingBufferStatus::Normal;
self.arr[self.tail] = byte; self.arr[self.tail] = byte;
self.tail = (self.tail + 1) % RING_BUFFER_SIZE; self.tail = (self.tail + 1) % RING_BUFFER_SIZE;
if self.tail == self.head { if self.tail == self.head {
self.status = RingBufferStatus::FULL; self.status = RingBufferStatus::Full;
} }
} }
pub fn read_byte(&mut self) -> u8 { pub fn read_byte(&mut self) -> u8 {
self.status = RingBufferStatus::NORMAL; self.status = RingBufferStatus::Normal;
let c = self.arr[self.head]; let c = self.arr[self.head];
self.head = (self.head + 1) % RING_BUFFER_SIZE; self.head = (self.head + 1) % RING_BUFFER_SIZE;
if self.head == self.tail { if self.head == self.tail {
self.status = RingBufferStatus::EMPTY; self.status = RingBufferStatus::Empty;
} }
c c
} }
pub fn available_read(&self) -> usize { pub fn available_read(&self) -> usize {
if self.status == RingBufferStatus::EMPTY { if self.status == RingBufferStatus::Empty {
0 0
} else if self.tail > self.head { } else if self.tail > self.head {
self.tail - self.head self.tail - self.head
@ -85,7 +85,7 @@ impl PipeRingBuffer {
} }
} }
pub fn available_write(&self) -> usize { pub fn available_write(&self) -> usize {
if self.status == RingBufferStatus::FULL { if self.status == RingBufferStatus::Full {
0 0
} else { } else {
RING_BUFFER_SIZE - self.available_read() RING_BUFFER_SIZE - self.available_read()
@ -113,7 +113,7 @@ impl File for Pipe {
self.writable self.writable
} }
fn read(&self, buf: UserBuffer) -> usize { fn read(&self, buf: UserBuffer) -> usize {
assert_eq!(self.readable(), true); assert!(self.readable());
let mut buf_iter = buf.into_iter(); let mut buf_iter = buf.into_iter();
let mut read_size = 0usize; let mut read_size = 0usize;
loop { loop {
@ -141,7 +141,7 @@ impl File for Pipe {
} }
} }
fn write(&self, buf: UserBuffer) -> usize { fn write(&self, buf: UserBuffer) -> usize {
assert_eq!(self.writable(), true); assert!(self.writable());
let mut buf_iter = buf.into_iter(); let mut buf_iter = buf.into_iter();
let mut write_size = 0usize; let mut write_size = 0usize;
loop { loop {

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@ -8,6 +8,13 @@ extern crate alloc;
#[macro_use] #[macro_use]
extern crate bitflags; extern crate bitflags;
#[cfg(feature = "board_k210")]
#[path = "boards/k210.rs"]
mod board;
#[cfg(not(any(feature = "board_k210")))]
#[path = "boards/qemu.rs"]
mod board;
#[macro_use] #[macro_use]
mod console; mod console;
mod config; mod config;

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@ -165,15 +165,15 @@ impl PhysAddr {
} }
impl PhysPageNum { impl PhysPageNum {
pub fn get_pte_array(&self) -> &'static mut [PageTableEntry] { pub fn get_pte_array(&self) -> &'static mut [PageTableEntry] {
let pa: PhysAddr = self.clone().into(); let pa: PhysAddr = (*self).into();
unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut PageTableEntry, 512) } unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut PageTableEntry, 512) }
} }
pub fn get_bytes_array(&self) -> &'static mut [u8] { pub fn get_bytes_array(&self) -> &'static mut [u8] {
let pa: PhysAddr = self.clone().into(); let pa: PhysAddr = (*self).into();
unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut u8, 4096) } unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut u8, 4096) }
} }
pub fn get_mut<T>(&self) -> &'static mut T { pub fn get_mut<T>(&self) -> &'static mut T {
let pa: PhysAddr = self.clone().into(); let pa: PhysAddr = (*self).into();
pa.get_mut() pa.get_mut()
} }
} }

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@ -72,7 +72,7 @@ impl FrameAllocator for StackFrameAllocator {
fn dealloc(&mut self, ppn: PhysPageNum) { fn dealloc(&mut self, ppn: PhysPageNum) {
let ppn = ppn.0; let ppn = ppn.0;
// validity check // validity check
if ppn >= self.current || self.recycled.iter().find(|&v| *v == ppn).is_some() { if ppn >= self.current || self.recycled.iter().any(|&v| v == ppn) {
panic!("Frame ppn={:#x} has not been allocated!", ppn); panic!("Frame ppn={:#x} has not been allocated!", ppn);
} }
// recycle // recycle
@ -101,7 +101,7 @@ pub fn frame_alloc() -> Option<FrameTracker> {
FRAME_ALLOCATOR FRAME_ALLOCATOR
.exclusive_access() .exclusive_access()
.alloc() .alloc()
.map(|ppn| FrameTracker::new(ppn)) .map(FrameTracker::new)
} }
pub fn frame_dealloc(ppn: PhysPageNum) { pub fn frame_dealloc(ppn: PhysPageNum) {

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@ -36,8 +36,8 @@ pub fn heap_test() {
for i in 0..500 { for i in 0..500 {
v.push(i); v.push(i);
} }
for i in 0..500 { for (i, val) in v.iter().take(500).enumerate() {
assert_eq!(v[i], i); assert_eq!(*val, i);
} }
assert!(bss_range.contains(&(v.as_ptr() as usize))); assert!(bss_range.contains(&(v.as_ptr() as usize)));
drop(v); drop(v);

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@ -313,12 +313,9 @@ impl MapArea {
page_table.map(vpn, ppn, pte_flags); page_table.map(vpn, ppn, pte_flags);
} }
pub fn unmap_one(&mut self, page_table: &mut PageTable, vpn: VirtPageNum) { pub fn unmap_one(&mut self, page_table: &mut PageTable, vpn: VirtPageNum) {
match self.map_type { if self.map_type == MapType::Framed {
MapType::Framed => {
self.data_frames.remove(&vpn); self.data_frames.remove(&vpn);
} }
_ => {}
}
page_table.unmap(vpn); page_table.unmap(vpn);
} }
pub fn map(&mut self, page_table: &mut PageTable) { pub fn map(&mut self, page_table: &mut PageTable) {
@ -376,29 +373,26 @@ pub fn remap_test() {
let mid_text: VirtAddr = ((stext as usize + etext as usize) / 2).into(); let mid_text: VirtAddr = ((stext as usize + etext as usize) / 2).into();
let mid_rodata: VirtAddr = ((srodata as usize + erodata as usize) / 2).into(); let mid_rodata: VirtAddr = ((srodata as usize + erodata as usize) / 2).into();
let mid_data: VirtAddr = ((sdata as usize + edata as usize) / 2).into(); let mid_data: VirtAddr = ((sdata as usize + edata as usize) / 2).into();
assert_eq!( assert!(
kernel_space !kernel_space
.page_table .page_table
.translate(mid_text.floor()) .translate(mid_text.floor())
.unwrap() .unwrap()
.writable(), .writable(),
false
); );
assert_eq!( assert!(
kernel_space !kernel_space
.page_table .page_table
.translate(mid_rodata.floor()) .translate(mid_rodata.floor())
.unwrap() .unwrap()
.writable(), .writable(),
false,
); );
assert_eq!( assert!(
kernel_space !kernel_space
.page_table .page_table
.translate(mid_data.floor()) .translate(mid_data.floor())
.unwrap() .unwrap()
.executable(), .executable(),
false,
); );
println!("remap_test passed!"); println!("remap_test passed!");
} }

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@ -77,8 +77,8 @@ impl PageTable {
let idxs = vpn.indexes(); let idxs = vpn.indexes();
let mut ppn = self.root_ppn; let mut ppn = self.root_ppn;
let mut result: Option<&mut PageTableEntry> = None; let mut result: Option<&mut PageTableEntry> = None;
for i in 0..3 { for (i, idx) in idxs.iter().enumerate() {
let pte = &mut ppn.get_pte_array()[idxs[i]]; let pte = &mut ppn.get_pte_array()[*idx];
if i == 2 { if i == 2 {
result = Some(pte); result = Some(pte);
break; break;
@ -96,8 +96,8 @@ impl PageTable {
let idxs = vpn.indexes(); let idxs = vpn.indexes();
let mut ppn = self.root_ppn; let mut ppn = self.root_ppn;
let mut result: Option<&mut PageTableEntry> = None; let mut result: Option<&mut PageTableEntry> = None;
for i in 0..3 { for (i, idx) in idxs.iter().enumerate() {
let pte = &mut ppn.get_pte_array()[idxs[i]]; let pte = &mut ppn.get_pte_array()[*idx];
if i == 2 { if i == 2 {
result = Some(pte); result = Some(pte);
break; break;
@ -122,7 +122,7 @@ impl PageTable {
*pte = PageTableEntry::empty(); *pte = PageTableEntry::empty();
} }
pub fn translate(&self, vpn: VirtPageNum) -> Option<PageTableEntry> { pub fn translate(&self, vpn: VirtPageNum) -> Option<PageTableEntry> {
self.find_pte(vpn).map(|pte| pte.clone()) self.find_pte(vpn).map(|pte| *pte)
} }
pub fn translate_va(&self, va: VirtAddr) -> Option<PhysAddr> { pub fn translate_va(&self, va: VirtAddr) -> Option<PhysAddr> {
self.find_pte(va.clone().floor()).map(|pte| { self.find_pte(va.clone().floor()).map(|pte| {

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@ -75,11 +75,10 @@ pub fn sys_waitpid(pid: isize, exit_code_ptr: *mut i32) -> isize {
// ---- access current PCB exclusively // ---- access current PCB exclusively
let mut inner = task.inner_exclusive_access(); let mut inner = task.inner_exclusive_access();
if inner if !inner
.children .children
.iter() .iter()
.find(|p| pid == -1 || pid as usize == p.getpid()) .any(|p| pid == -1 || pid as usize == p.getpid())
.is_none()
{ {
return -1; return -1;
// ---- release current PCB // ---- release current PCB

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@ -43,7 +43,7 @@ pub fn fetch_task() -> Option<Arc<TaskControlBlock>> {
pub fn pid2task(pid: usize) -> Option<Arc<TaskControlBlock>> { pub fn pid2task(pid: usize) -> Option<Arc<TaskControlBlock>> {
let map = PID2TCB.exclusive_access(); let map = PID2TCB.exclusive_access();
map.get(&pid).map(|task| Arc::clone(task)) map.get(&pid).map(Arc::clone)
} }
pub fn remove_from_pid2task(pid: usize) { pub fn remove_from_pid2task(pid: usize) {

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@ -4,6 +4,7 @@ mod pid;
mod processor; mod processor;
mod signal; mod signal;
mod switch; mod switch;
#[allow(clippy::module_inception)]
mod task; mod task;
use crate::fs::{open_file, OpenFlags}; use crate::fs::{open_file, OpenFlags};

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@ -27,7 +27,7 @@ impl PidAllocator {
pub fn dealloc(&mut self, pid: usize) { pub fn dealloc(&mut self, pid: usize) {
assert!(pid < self.current); assert!(pid < self.current);
assert!( assert!(
self.recycled.iter().find(|ppid| **ppid == pid).is_none(), !self.recycled.iter().any(|ppid| *ppid == pid),
"pid {} has been deallocated!", "pid {} has been deallocated!",
pid pid
); );

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@ -25,7 +25,7 @@ impl Processor {
self.current.take() self.current.take()
} }
pub fn current(&self) -> Option<Arc<TaskControlBlock>> { pub fn current(&self) -> Option<Arc<TaskControlBlock>> {
self.current.as_ref().map(|task| Arc::clone(task)) self.current.as_ref().map(Arc::clone)
} }
} }