mirror of
https://github.com/rcore-os/rCore-Tutorial-v3.git
synced 2024-11-22 01:16:26 +04:00
We should disable sie before trapping back to user.
This commit is contained in:
parent
fbe8e39b38
commit
334d868a5c
@ -28,31 +28,18 @@ pub fn device_init() {
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plic.enable(hart_id, supervisor, intr_src_id);
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plic.enable(hart_id, supervisor, intr_src_id);
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plic.set_priority(intr_src_id, 1);
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plic.set_priority(intr_src_id, 1);
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}
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}
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crate::println!(
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"Hart0M threshold = {}",
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plic.get_threshold(hart_id, IntrTargetPriority::Machine)
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);
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crate::println!(
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"Hart0S threshold = {}",
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plic.get_threshold(hart_id, IntrTargetPriority::Supervisor)
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);
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crate::println!("1 prio = {}", plic.get_priority(1));
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crate::println!("10 prio = {}", plic.get_priority(10));
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unsafe {
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unsafe {
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sie::set_sext();
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sie::set_sext();
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}
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}
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}
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}
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pub fn irq_handler() {
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pub fn irq_handler() {
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//crate::println!("->irq_handler");
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let mut plic = unsafe { PLIC::new(VIRT_PLIC) };
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let mut plic = unsafe { PLIC::new(VIRT_PLIC) };
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let intr_src_id = plic.claim(0, IntrTargetPriority::Supervisor);
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let intr_src_id = plic.claim(0, IntrTargetPriority::Supervisor);
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//crate::println!("intr_src={}", intr_src_id);
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match intr_src_id {
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match intr_src_id {
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1 => BLOCK_DEVICE.handle_irq(),
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1 => BLOCK_DEVICE.handle_irq(),
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10 => UART.handle_irq(),
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10 => UART.handle_irq(),
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_ => panic!("unsupported IRQ {}", intr_src_id),
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_ => panic!("unsupported IRQ {}", intr_src_id),
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}
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}
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plic.complete(0, IntrTargetPriority::Supervisor, intr_src_id);
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plic.complete(0, IntrTargetPriority::Supervisor, intr_src_id);
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//crate::println!("irq_handler->");
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}
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}
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@ -7,8 +7,8 @@ struct Stdout;
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impl Write for Stdout {
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impl Write for Stdout {
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fn write_str(&mut self, s: &str) -> fmt::Result {
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fn write_str(&mut self, s: &str) -> fmt::Result {
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for c in s.chars() {
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for c in s.chars() {
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//UART.write(c as u8);
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UART.write(c as u8);
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console_putchar(c as usize);
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//console_putchar(c as usize);
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -28,10 +28,17 @@ impl BlockDevice for VirtIOBlock {
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let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
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let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
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if nb {
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if nb {
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let mut resp = BlkResp::default();
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let mut resp = BlkResp::default();
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/*
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let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
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let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
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let token = unsafe { blk.read_block_nb(block_id, buf, &mut resp).unwrap() };
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let token = unsafe { blk.read_block_nb(block_id, buf, &mut resp).unwrap() };
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self.condvars.get(&token).unwrap().wait_no_sched()
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self.condvars.get(&token).unwrap().wait_no_sched()
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});
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});
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*/
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let mut blk = self.virtio_blk.exclusive_access();
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let token = unsafe { blk.read_block_nb(block_id, buf, &mut resp).unwrap() };
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//println!("waiting on token {}", token);
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let task_cx_ptr = self.condvars.get(&token).unwrap().wait_no_sched();
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drop(blk);
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schedule(task_cx_ptr);
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schedule(task_cx_ptr);
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assert_eq!(
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assert_eq!(
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resp.status(),
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resp.status(),
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@ -49,10 +56,16 @@ impl BlockDevice for VirtIOBlock {
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let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
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let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
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if nb {
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if nb {
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let mut resp = BlkResp::default();
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let mut resp = BlkResp::default();
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/*
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let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
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let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
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let token = unsafe { blk.write_block_nb(block_id, buf, &mut resp).unwrap() };
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let token = unsafe { blk.write_block_nb(block_id, buf, &mut resp).unwrap() };
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self.condvars.get(&token).unwrap().wait_no_sched()
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self.condvars.get(&token).unwrap().wait_no_sched()
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});
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});
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*/
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let mut blk = self.virtio_blk.exclusive_access();
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let token = unsafe { blk.write_block_nb(block_id, buf, &mut resp).unwrap() };
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let task_cx_ptr = self.condvars.get(&token).unwrap().wait_no_sched();
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drop(blk);
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schedule(task_cx_ptr);
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schedule(task_cx_ptr);
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assert_eq!(
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assert_eq!(
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resp.status(),
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resp.status(),
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@ -68,6 +81,7 @@ impl BlockDevice for VirtIOBlock {
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}
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}
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fn handle_irq(&self) {
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fn handle_irq(&self) {
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//println!("into handle_irq");
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//println!("into handle_irq");
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/*
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self.virtio_blk.exclusive_session(|blk| {
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self.virtio_blk.exclusive_session(|blk| {
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//println!("not panic here");
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//println!("not panic here");
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while let Ok(token) = blk.pop_used() {
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while let Ok(token) = blk.pop_used() {
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@ -75,6 +89,12 @@ impl BlockDevice for VirtIOBlock {
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self.condvars.get(&token).unwrap().signal();
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self.condvars.get(&token).unwrap().signal();
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}
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}
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});
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});
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*/
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let mut blk = self.virtio_blk.exclusive_access();
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while let Ok(token) = blk.pop_used() {
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//println!("wakeup virtio.token {}", token);
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self.condvars.get(&token).unwrap().signal();
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}
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}
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}
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}
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}
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@ -146,15 +146,15 @@ impl<const BASE_ADDR: usize> NS16550a<BASE_ADDR> {
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impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
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impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
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fn read(&self) -> u8 {
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fn read(&self) -> u8 {
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println!("NS16550a::read");
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//println!("NS16550a::read");
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loop {
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loop {
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let mut inner = self.inner.exclusive_access();
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let mut inner = self.inner.exclusive_access();
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if let Some(ch) = inner.read_buffer.pop_front() {
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if let Some(ch) = inner.read_buffer.pop_front() {
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return ch;
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return ch;
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} else {
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} else {
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println!("no ch yet!");
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let task_cx_ptr = self.condvar.wait_no_sched();
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let task_cx_ptr = self.condvar.wait_no_sched();
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drop(inner);
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drop(inner);
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//println!("before scheduling");
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schedule(task_cx_ptr);
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schedule(task_cx_ptr);
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}
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}
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}
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}
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@ -167,7 +167,7 @@ impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
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let mut inner = self.inner.exclusive_access();
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let mut inner = self.inner.exclusive_access();
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let mut count = 0;
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let mut count = 0;
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while let Some(ch) = inner.ns16550a.read() {
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while let Some(ch) = inner.ns16550a.read() {
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println!("got {}", ch as char);
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//println!("got {}", ch as char);
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count += 1;
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count += 1;
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inner.read_buffer.push_back(ch);
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inner.read_buffer.push_back(ch);
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}
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}
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@ -14,7 +14,7 @@ impl File for Stdin {
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}
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}
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fn read(&self, mut user_buf: UserBuffer) -> usize {
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fn read(&self, mut user_buf: UserBuffer) -> usize {
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assert_eq!(user_buf.len(), 1);
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assert_eq!(user_buf.len(), 1);
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println!("before UART.read() in Stdin::read()");
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//println!("before UART.read() in Stdin::read()");
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let ch = UART.read();
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let ch = UART.read();
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unsafe {
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unsafe {
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user_buf.buffers[0].as_mut_ptr().write_volatile(ch);
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user_buf.buffers[0].as_mut_ptr().write_volatile(ch);
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@ -36,9 +36,14 @@ impl Condvar {
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}
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}
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pub fn wait_no_sched(&self) -> *mut TaskContext {
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pub fn wait_no_sched(&self) -> *mut TaskContext {
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/*
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self.inner.exclusive_session(|inner| {
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self.inner.exclusive_session(|inner| {
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inner.wait_queue.push_back(current_task().unwrap());
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inner.wait_queue.push_back(current_task().unwrap());
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});
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});
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*/
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let mut inner = self.inner.exclusive_access();
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inner.wait_queue.push_back(current_task().unwrap());
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drop(inner);
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block_current_task()
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block_current_task()
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}
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}
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@ -3,6 +3,7 @@ use core::ops::{Deref, DerefMut};
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use riscv::register::sstatus;
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use riscv::register::sstatus;
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use lazy_static::*;
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use lazy_static::*;
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/*
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/// Wrap a static data structure inside it so that we are
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/// Wrap a static data structure inside it so that we are
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/// able to access it without any `unsafe`.
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/// able to access it without any `unsafe`.
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///
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///
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@ -30,6 +31,7 @@ impl<T> UPSafeCell<T> {
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self.inner.borrow_mut()
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self.inner.borrow_mut()
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}
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}
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}
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}
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*/
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pub struct UPSafeCellRaw<T> {
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pub struct UPSafeCellRaw<T> {
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inner: UnsafeCell<T>,
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inner: UnsafeCell<T>,
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@ -105,10 +107,12 @@ impl<T> UPIntrFreeCell<T> {
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UPIntrRefMut(Some(self.inner.borrow_mut()))
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UPIntrRefMut(Some(self.inner.borrow_mut()))
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}
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}
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/*
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pub fn exclusive_session<F, V>(&self, f: F) -> V where F: FnOnce(&mut T) -> V {
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pub fn exclusive_session<F, V>(&self, f: F) -> V where F: FnOnce(&mut T) -> V {
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let mut inner = self.exclusive_access();
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let mut inner = self.exclusive_access();
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f(inner.deref_mut())
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f(inner.deref_mut())
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}
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}
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*/
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}
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}
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impl<'a, T> Drop for UPIntrRefMut<'a, T> {
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impl<'a, T> Drop for UPIntrRefMut<'a, T> {
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@ -50,6 +50,12 @@ fn enable_supervisor_interrupt() {
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}
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}
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}
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}
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fn disable_supervisor_interrupt() {
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unsafe {
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sstatus::clear_sie();
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}
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}
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#[no_mangle]
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#[no_mangle]
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pub fn trap_handler() -> ! {
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pub fn trap_handler() -> ! {
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set_kernel_trap_entry();
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set_kernel_trap_entry();
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@ -62,8 +68,6 @@ pub fn trap_handler() -> ! {
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let mut cx = current_trap_cx();
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let mut cx = current_trap_cx();
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cx.sepc += 4;
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cx.sepc += 4;
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//println!("syscall id={}", cx.x[17]);
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//println!("after setting sstatus.sie");
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enable_supervisor_interrupt();
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enable_supervisor_interrupt();
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// get system call return value
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// get system call return value
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@ -117,6 +121,7 @@ pub fn trap_handler() -> ! {
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#[no_mangle]
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#[no_mangle]
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pub fn trap_return() -> ! {
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pub fn trap_return() -> ! {
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disable_supervisor_interrupt();
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set_user_trap_entry();
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set_user_trap_entry();
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let trap_cx_user_va = current_trap_cx_user_va();
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let trap_cx_user_va = current_trap_cx_user_va();
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let user_satp = current_user_token();
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let user_satp = current_user_token();
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@ -139,17 +144,7 @@ pub fn trap_return() -> ! {
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}
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}
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#[no_mangle]
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#[no_mangle]
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pub fn trap_from_kernel(trap_cx: &TrapContext) {
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pub fn trap_from_kernel(_trap_cx: &TrapContext) {
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/*
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use riscv::register::sepc;
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println!("a trap {:?} from kernel!", scause::read().cause());
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println!("stval = {:#x}, sepc = {:#x}", stval::read(), sepc::read());
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//panic!("a trap {:?} from kernel!", scause::read().cause());
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*/
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//panic!("a trap {:?} from kernel!", scause::read().cause());
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//println!("->trap_from_kernel");
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//println!("a trap {:?} from kernel!", scause::read().cause());
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//println!("sepc = {:#x}", trap_cx.sepc);
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let scause = scause::read();
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let scause = scause::read();
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let stval = stval::read();
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let stval = stval::read();
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match scause.cause() {
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match scause.cause() {
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@ -169,7 +164,6 @@ pub fn trap_from_kernel(trap_cx: &TrapContext) {
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);
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);
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},
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},
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}
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}
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//println!("trap_from_kernel->");
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}
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}
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pub use context::TrapContext;
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pub use context::TrapContext;
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