From a2a94006f3d01aa0f4ca4483149d6f83cfc75303 Mon Sep 17 00:00:00 2001 From: Stephen Marz Date: Wed, 9 Oct 2019 18:21:43 -0400 Subject: [PATCH] Added newline at the end of file, mapped all of PLIC and CLINT --- risc_v/ch3/src/lib.rs | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/risc_v/ch3/src/lib.rs b/risc_v/ch3/src/lib.rs index b5dd9bc..e9d3abc 100755 --- a/risc_v/ch3/src/lib.rs +++ b/risc_v/ch3/src/lib.rs @@ -159,10 +159,26 @@ fn kinit() -> usize { page::map(&mut root, 0x1000_0000, 0x1000_0000, page::EntryBits::ReadWrite.val()); // CLINT + // -> MSIP page::map(&mut root, 0x0200_0000, 0x0200_0000, page::EntryBits::ReadWrite.val()); + // -> MTIMECMP + page::map(&mut root, 0x0200_b000, 0x0200_b000, page::EntryBits::ReadWrite.val()); + // -> MTIME + page::map(&mut root, 0x0200_b000, 0x0200_b000, page::EntryBits::ReadWrite.val()); + page::map(&mut root, 0x0200_c000, 0x0200_c000, page::EntryBits::ReadWrite.val()); // PLIC + // -> Source priority page::map(&mut root, 0x0c00_0000, 0x0c00_0000, page::EntryBits::ReadWrite.val()); + // -> Pending array + page::map(&mut root, 0x0c00_1000, 0x0c00_1000, page::EntryBits::ReadWrite.val()); + // -> Interrupt enables + page::map(&mut root, 0x0c00_2000, 0x0c00_2000, page::EntryBits::ReadWrite.val()); + // -> Priority threshold and claim/complete registers + for i in 0..=8 { + let m = 0x0c20_0000 + (i << 12); + page::map(&mut root, m, m, page::EntryBits::ReadWrite.val()); + } // When we return from here, we'll go back to boot.S and switch into supervisor mode // We will return the SATP register to be written when we return. @@ -269,4 +285,4 @@ fn kmain() { pub mod uart; pub mod page; -pub mod kmem; \ No newline at end of file +pub mod kmem;