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During a trap, only save the FPU if the process changed them.

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Stephen Marz 2020-05-15 13:11:19 -04:00
parent 3793ad1e87
commit 720d084364
1 changed files with 4 additions and 5 deletions
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9
risc_v/src/asm/trap.S
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@ -58,8 +58,8 @@ m_trap_vector:
csrr t1, mstatus csrr t1, mstatus
srli t0, t1, 13 srli t0, t1, 13
andi t0, t0, 3 andi t0, t0, 3
li t3, 3
beqz t0, 1f bne t0, t3, 1f
# Save floating point registers # Save floating point registers
.set i, 0 .set i, 0
.rept 32 .rept 32
@ -94,8 +94,8 @@ m_trap_vector:
csrr t1, mstatus csrr t1, mstatus
srli t0, t1, 13 srli t0, t1, 13
andi t0, t0, 3 andi t0, t0, 3
li t3, 3
beqz t0, 1f bne t0, t3, 1f
.set i, 0 .set i, 0
.rept 32 .rept 32
load_fp %i load_fp %i
@ -154,7 +154,6 @@ switch_to_user:
csrr t1, mstatus csrr t1, mstatus
srli t0, t1, 13 srli t0, t1, 13
andi t0, t0, 3 andi t0, t0, 3
beqz t0, 1f beqz t0, 1f
.set i, 0 .set i, 0
.rept 32 .rept 32