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Stephen Marz 2019-11-18 19:19:05 -05:00
parent 7faf580765
commit 61bb8f3a43
1 changed files with 17 additions and 1 deletions
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18
risc_v/ch5/src/trap.rs
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@ -52,14 +52,27 @@ extern "C" fn m_trap(epc: usize,
11 => {
// Machine external (interrupt from Platform Interrupt Controller (PLIC))
// println!("Machine external interrupt CPU#{}", hart);
// We will check the next interrupt. If the interrupt isn't available, this will
// give us None. However, that would mean we got a spurious interrupt, unless we
// get an interrupt from a non-PLIC source. This is the main reason that the PLIC
// hardwires the id 0 to 0, so that we can use it as an error case.
if let Some(interrupt) = plic::next() {
// If we get here, we've got an interrupt from the claim register. The PLIC will
// automatically prioritize the next interrupt, so when we get it from claim, it
// will be the next in priority order.
match interrupt {
10 => {
// UART
// We would typically set this to be handled out of the interrupt context,
// but we're testing here! C'mon!
// We haven't yet used the singleton pattern for my_uart, but remember, this
// just simply wraps 0x1000_0000 (UART).
let mut my_uart = uart::Uart::new(0x1000_0000);
// If we get here, the UART better have something! If not, what happened??
if let Some(c) = my_uart.get() {
// If you recognize this code, it used to be in the lib.rs under kmain(). That
// was because we needed to poll for UART data. Now that we have interrupts,
// here it goes!
match c {
8 => {
// This is a backspace, so we
@ -78,7 +91,10 @@ extern "C" fn m_trap(epc: usize,
}
},
_ => {}
// Non-UART interrupts go here and do nothing.
_ => {
println!("Non-UART external interrupt: {}", interrupt);
}
}
// We've claimed it, so now say that we've handled it. This resets the interrupt pending
// and allows the UART to interrupt again. Otherwise, the UART will get "stuck".