Wladimir J. van der Laan 4f2c51e00d rust: Unswizzle framebuffer for ST7789V display ... By swapping the endian in RAMCTRL as well as in the SPI driver, the frame format can be coerced into the "normal" order of pixels in little endian, `0xBBBBAAAA` instead of `0xAAAABBBB`. This allows seamless casting from an array of `u16`. Accessing as 32-bit units might still be desirable for performance, but it is a lesser worry now. Note that a 32-bit alignment constraint still does hold for DMA.		2020-11-06 07:26:24 +00:00
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aligned_as.rs	rust: Use aligned_as macro in voxel	2020-03-06 21:12:57 +00:00
main.rs	rust: Unswizzle framebuffer for ST7789V display	2020-11-06 07:26:24 +00:00
map_data.rs	rust: Use aligned_as macro in voxel	2020-03-06 21:12:57 +00:00