// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2019-20 Sean Anderson */ #include #include #include / { /* * Although the K210 is a 64-bit CPU, the address bus is only 32-bits * wide, and the upper half of all addresses is ignored. */ #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210"; aliases { gpio0 = &gpio0; gpio1 = &gpio1_0; serial0 = &uarths0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; spi3 = &spi3; }; clocks { in0: osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; }; cpus { #address-cells = <1>; #size-cells = <0>; timebase-frequency = <7800000>; cpu0: cpu@0 { device_type = "cpu"; compatible = "kendryte,k210", "sifive,rocket0", "riscv"; reg = <0>; riscv,isa = "rv64imafdgc"; mmu-type = "sv39"; i-cache-block-size = <64>; i-cache-size = <0x8000>; d-cache-block-size = <64>; d-cache-size = <0x8000>; clocks = <&sysclk K210_CLK_CPU>; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; interrupt-controller; compatible = "riscv,cpu-intc"; }; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "kendryte,k210", "sifive,rocket0", "riscv"; reg = <1>; riscv,isa = "rv64imafdgc"; mmu-type = "sv39"; i-cache-block-size = <64>; i-cache-size = <0x8000>; d-cache-block-size = <64>; d-cache-size = <0x8000>; clocks = <&sysclk K210_CLK_CPU>; cpu1_intc: interrupt-controller { #interrupt-cells = <1>; interrupt-controller; compatible = "riscv,cpu-intc"; }; }; }; sram0: memory@80000000 { device_type = "memory"; compatible = "kendryte,k210-sram"; reg = <0x80000000 0x400000>; clocks = <&sysclk K210_CLK_SRAM0>; }; sram1: memory@80400000 { device_type = "memory"; reg = <0x80400000 0x200000>; compatible = "kendryte,k210-sram"; clocks = <&sysclk K210_CLK_SRAM1>; }; airam: memory@80600000 { device_type = "memory"; reg = <0x80600000 0x200000>; compatible = "kendryte,k210-airam"; clocks = <&sysclk K210_CLK_PLL1>; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; ai_reserved: ai@80600000 { reg = <0x80600000 0x200000>; reusable; }; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-soc", "simple-bus"; ranges; interrupt-parent = <&plic0>; debug0: debug@0 { compatible = "kendryte,k210-debug", "riscv,debug"; reg = <0x0 0x1000>; }; rom0: nvmem@1000 { reg = <0x1000 0x1000>; read-only; }; clint0: interrupt-controller@2000000 { #interrupt-cells = <1>; compatible = "kendryte,k210-clint", "riscv,clint0"; reg = <0x2000000 0x1000>; interrupt-controller; interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, <&cpu1_intc 3>, <&cpu1_intc 7>; clocks = <&sysclk K210_CLK_CPU>; }; plic0: interrupt-controller@C000000 { #interrupt-cells = <1>; compatible = "kendryte,k210-plic", "riscv,plic0"; reg = <0xC000000 0x4000000>; interrupt-controller; interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>, <&cpu1_intc 9>, <&cpu1_intc 11>; riscv,ndev = <65>; riscv,max-priority = <7>; }; uarths0: serial@38000000 { compatible = "kendryte,k210-uarths", "sifive,uart0"; reg = <0x38000000 0x1000>; interrupts = <33>; clocks = <&sysclk K210_CLK_CPU>; status = "disabled"; }; gpio0: gpio-controller@38001000 { #interrupt-cells = <2>; #gpio-cells = <2>; compatible = "kendryte,k210-gpiohs", "sifive,gpio0"; reg = <0x38001000 0x1000>; interrupt-controller; interrupts = <34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65>; gpio-controller; ngpios = <32>; status = "disabled"; }; kpu0: ai@40800000 { compatible = "kendryte,k210-ai"; reg = <0x40800000 0xc00000>; interrupts = <25>; clocks = <&sysclk K210_CLK_AI>; memory-region = <&ai_reserved>; status = "disabled"; }; fft0: fft@42000000 { compatible = "kendryte,k210-fft"; reg = <0x42000000 0x400000>; interrupts = <26>; clocks = <&sysclk K210_CLK_FFT>; resets = <&sysrst K210_RST_FFT>; status = "disabled"; }; dmac0: dma-controller@50000000 { compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a"; reg = <0x50000000 0x1000>; interrupts = <27 28 29 30 31 32>; clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>; clock-names = "core-clk", "cfgr-clk"; resets = <&sysrst K210_RST_DMA>; dma-channels = <6>; snps,dma-masters = <2>; snps,data-width = <5>; snps,block-size = <0x400000 0x400000 0x400000 0x400000 0x400000 0x400000>; snps,axi-max-burst-len = <256>; status = "disabled"; }; apb0: bus@50200000 { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-apb", "simple-pm-bus"; ranges; clocks = <&sysclk K210_CLK_APB0>; gpio1: gpio-controller@50200000 { #address-cells = <1>; #size-cells = <0>; compatible = "kendryte,k210-gpio", "snps,dw-apb-gpio"; reg = <0x50200000 0x80>; clocks = <&sysclk K210_CLK_GPIO>; resets = <&sysrst K210_RST_GPIO>; status = "disabled"; gpio1_0: gpio1@0 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "snps,dw-apb-gpio-port"; reg = <0>; interrupt-controller; interrupts = <23>; gpio-controller; snps,nr-gpios = <8>; }; }; uart1: serial@50210000 { compatible = "kendryte,k210-uart", "snps,dw-apb-uart"; reg = <0x50210000 0x100>; interrupts = <11>; clocks = <&sysclk K210_CLK_UART1>; resets = <&sysrst K210_RST_UART1>; reg-io-width = <4>; reg-shift = <2>; dcd-override; dsr-override; cts-override; ri-override; status = "disabled"; }; uart2: serial@50220000 { compatible = "kendryte,k210-uart", "snps,dw-apb-uart"; reg = <0x50220000 0x100>; interrupts = <12>; clocks = <&sysclk K210_CLK_UART2>; resets = <&sysrst K210_RST_UART2>; reg-io-width = <4>; reg-shift = <2>; dcd-override; dsr-override; cts-override; ri-override; status = "disabled"; }; uart3: serial@50230000 { compatible = "kendryte,k210-uart", "snps,dw-apb-uart"; reg = <0x50230000 0x100>; interrupts = <13>; clocks = <&sysclk K210_CLK_UART3>; resets = <&sysrst K210_RST_UART3>; reg-io-width = <4>; reg-shift = <2>; dcd-override; dsr-override; cts-override; ri-override; status = "disabled"; }; spi2: spi@50240000 { compatible = "kendryte,k120-spislave", "snps,dw-apb-ssi"; spi-slave; reg = <0x50240000 0x100>; interrupts = <2>; clocks = <&sysclk K210_CLK_SPI2>; resets = <&sysrst K210_RST_SPI2>; spi-max-frequency = <25000000>; /* * Likely not the only offset change, but this * is the only one which is documented. */ snps,tmod-offset = <8>; status = "disabled"; }; i2s0: i2s@50250000 { compatible = "kendryte,k210-i2s", "snps,designware-i2s"; reg = <0x50250000 0x200>; interrupts = <5>; clocks = <&sysclk K210_CLK_I2S0>; clock-names = "i2sclk"; resets = <&sysrst K210_RST_I2S0>; status = "disabled"; }; apu0: sound@520250200 { compatible = "kendryte,k210-apu"; reg = <0x50250200 0x200>; status = "disabled"; }; i2s1: i2s@50260000 { compatible = "kendryte,k210-i2s", "snps,designware-i2s"; reg = <0x50260000 0x200>; interrupts = <6>; clocks = <&sysclk K210_CLK_I2S1>; clock-names = "i2sclk"; resets = <&sysrst K210_RST_I2S1>; status = "disabled"; }; i2s2: i2s@50270000 { compatible = "kendryte,k210-i2s", "snps,designware-i2s"; reg = <0x50270000 0x200>; interrupts = <7>; clocks = <&sysclk K210_CLK_I2S2>; clock-names = "i2sclk"; resets = <&sysrst K210_RST_I2S2>; status = "disabled"; }; i2c0: i2c@50280000 { compatible = "kendryte,k210-i2c", "snps,designware-i2c"; reg = <0x50280000 0x100>; interrupts = <8>; clocks = <&sysclk K210_CLK_I2C0>; resets = <&sysrst K210_RST_I2C0>; status = "disabled"; }; i2c1: i2c@50290000 { compatible = "kendryte,k210-i2c", "snps,designware-i2c"; reg = <0x50290000 0x100>; interrupts = <9>; clocks = <&sysclk K210_CLK_I2C1>; resets = <&sysrst K210_RST_I2C1>; status = "disabled"; }; i2c2: i2c@502A0000 { compatible = "kendryte,k210-i2c", "snps,designware-i2c"; reg = <0x502A0000 0x100>; interrupts = <10>; clocks = <&sysclk K210_CLK_I2C2>; resets = <&sysrst K210_RST_I2C2>; status = "disabled"; }; fpioa: pinmux@502B0000 { compatible = "kendryte,k210-fpioa"; reg = <0x502B0000 0x100>; clocks = <&sysclk K210_CLK_FPIOA>; resets = <&sysrst K210_RST_FPIOA>; status = "disabled"; }; sha256: sha256@502C0000 { compatible = "kendryte,k210-sha256"; reg = <0x502C0000 0x100>; clocks = <&sysclk K210_CLK_SHA>; resets = <&sysrst K210_RST_SHA>; status = "disabled"; }; timer0: timer@502D0000 { compatible = "kendryte,k210-timer", "snps,dw-apb-timer"; reg = <0x502D0000 0x100>; interrupts = <14 15>; clocks = <&sysclk K210_CLK_TIMER0>; clock-names = "timer"; resets = <&sysrst K210_RST_TIMER0>; status = "disabled"; }; timer1: timer@502E0000 { compatible = "kendryte,k210-timer", "snps,dw-apb-timer"; reg = <0x502E0000 0x100>; interrupts = <16 17>; clocks = <&sysclk K210_CLK_TIMER1>; clock-names = "timer"; resets = <&sysrst K210_RST_TIMER1>; status = "disabled"; }; timer2: timer@502F0000 { compatible = "kendryte,k210-timer", "snps,dw-apb-timer"; reg = <0x502F0000 0x100>; interrupts = <18 19>; clocks = <&sysclk K210_CLK_TIMER2>; clock-names = "timer"; resets = <&sysrst K210_RST_TIMER2>; status = "disabled"; }; }; apb1: bus@50400000 { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-apb", "simple-pm-bus"; ranges; clocks = <&sysclk K210_CLK_APB1>; wdt0: watchdog@50400000 { compatible = "kendryte,k210-wdt", "snps,dw-wdt"; reg = <0x50400000 0x100>; interrupts = <21>; clocks = <&sysclk K210_CLK_WDT0>; resets = <&sysrst K210_RST_WDT0>; status = "disabled"; }; wdt1: watchdog@50410000 { compatible = "kendryte,k210-wdt", "snps,dw-wdt"; reg = <0x50410000 0x100>; interrupts = <22>; clocks = <&sysclk K210_CLK_WDT1>; resets = <&sysrst K210_RST_WDT1>; status = "disabled"; }; otp0: nvmem@50420000 { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-otp"; reg = <0x50420000 0x100>, <0x88000000 0x20000>; reg-names = "reg", "mem"; clocks = <&sysclk K210_CLK_ROM>; resets = <&sysrst K210_RST_ROM>; read-only; status = "disabled"; /* Bootloader */ firmware@00000 { reg = <0x00000 0xC200>; }; /* * config string as described in RISC-V * privileged spec 1.9 */ config-1-9@1c000 { reg = <0x1C000 0x1000>; }; /* * Device tree containing only registers, * interrupts, and cpus */ fdt@1d000 { reg = <0x1D000 0x2000>; }; /* CPU/ROM credits */ credits@1f000 { reg = <0x1F000 0x1000>; }; }; dvp0: camera@50430000 { compatible = "kendryte,k210-dvp"; reg = <0x50430000 0x100>; interrupts = <24>; clocks = <&sysclk K210_CLK_DVP>; resets = <&sysrst K210_RST_DVP>; status = "disabled"; }; sysctl: syscon@50440000 { compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd"; reg = <0x50440000 0x100>; reg-io-width = <4>; sysclk: clock-controller { #clock-cells = <1>; compatible = "kendryte,k210-clk"; clocks = <&in0>; }; sysrst: reset-controller { compatible = "kendryte,k210-rst", "syscon-reset"; #reset-cells = <1>; regmap = <&sysctl>; offset = ; mask = <0x27FFFFFF>; assert-high = <1>; }; reboot { compatible = "syscon-reboot"; regmap = <&sysctl>; offset = ; mask = <1>; value = <1>; }; }; aes0: aes@50450000 { compatible = "kendryte,k210-aes"; reg = <0x50450000 0x100>; clocks = <&sysclk K210_CLK_AES>; resets = <&sysrst K210_RST_AES>; status = "disabled"; }; rtc: rtc@50460000 { compatible = "kendryte,k210-rtc"; reg = <0x50460000 0x100>; clocks = <&in0>; resets = <&sysrst K210_RST_RTC>; interrupts = <20>; status = "disabled"; }; }; apb2: bus@52000000 { #address-cells = <1>; #size-cells = <1>; compatible = "kendryte,k210-apb", "simple-pm-bus"; ranges; clocks = <&sysclk K210_CLK_APB2>; spi0: spi@52000000 { #address-cells = <1>; #size-cells = <0>; compatible = "kendryte,k210-spi", "snps,dw-apb-ssi"; reg = <0x52000000 0x100>; interrupts = <1>; clocks = <&sysclk K210_CLK_SPI0>; clock-names = "ssi_clk"; resets = <&sysrst K210_RST_SPI0>; spi-max-frequency = <25000000>; num-cs = <4>; reg-io-width = <4>; status = "disabled"; }; spi1: spi@53000000 { #address-cells = <1>; #size-cells = <0>; compatible = "kendryte,k210-spi", "snps,dw-apb-ssi"; reg = <0x53000000 0x100>; interrupts = <2>; clocks = <&sysclk K210_CLK_SPI1>; clock-names = "ssi_clk"; resets = <&sysrst K210_RST_SPI1>; spi-max-frequency = <25000000>; num-cs = <4>; reg-io-width = <4>; status = "disabled"; }; spi3: spi@54000000 { #address-cells = <1>; #size-cells = <0>; compatible = "kendryte,k210-spi", "snps,dw-apb-ssi"; reg = <0x54000000 0x200>; interrupts = <4>; clocks = <&sysclk K210_CLK_SPI3>; clock-names = "ssi_clk"; resets = <&sysrst K210_RST_SPI3>; /* Could possibly go up to 200 MHz */ spi-max-frequency = <100000000>; num-cs = <4>; reg-io-width = <4>; status = "disabled"; }; }; }; };