By swapping the endian in RAMCTRL as well as in the SPI driver,
the frame format can be coerced into the "normal" order of pixels in
little endian, `0xBBBBAAAA` instead of `0xAAAABBBB`. This allows
seamless casting from an array of `u16`.
Accessing as 32-bit units might still be desirable for performance, but
it is a lesser worry now.
Note that a 32-bit alignment constraint still does hold for DMA.