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https://github.com/laanwj/k210-sdk-stuff.git
synced 2024-11-22 01:16:20 +04:00
rust: Split AES into three parts, setup, process data and finish
Might want to re-use the setup/finish code for streaming data and/or DMA.
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@ -30,30 +30,16 @@ fn write4pad(arr: &mut [u8], ofs: usize, val: u32) {
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arr[ofs..ofs+n].copy_from_slice(&val.to_le_bytes()[0..n]);
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}
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/** AES operation (encrypt or decrypt) using hardware engine. Takes a &mut
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* AES as only one operation can be active at a time.
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*
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* Supported modes:
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*
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* Mode Keybits Extra input Extra output
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* ---- --------------- ------------------------ ----------------
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* ECB 128 / 192 / 256 no IV
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* CBC 128 / 192 / 256 128 bit IV
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* GCM 128 / 192 / 256 96 bit IV + ? bytes AAD) 128 bit tag (optional)
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*/
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pub fn run(
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fn setup(
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aes: &mut pac::AES,
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cipher_mode: cipher_mode,
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encrypt_sel: encrypt_sel,
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key: &[u8],
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iv: &[u8],
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aad: &[u8],
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ind: &[u8],
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outd: &mut [u8],
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tag: &mut [u8],
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)
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{
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assert!(ind.len() != 0);
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len: usize,
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) {
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assert!(len != 0);
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match cipher_mode {
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cipher_mode::ECB => assert!(iv.len() == 0 && aad.len() == 0),
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cipher_mode::CBC => assert!(iv.len() == 16 && aad.len() == 0),
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@ -89,7 +75,7 @@ pub fn run(
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aes.encrypt_sel.write(|w|
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w.encrypt_sel().variant(encrypt_sel));
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aes.aad_num.write(|w| w.bits((aad.len() as u32).wrapping_sub(1)));
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aes.pc_num.write(|w| w.bits((ind.len() as u32).wrapping_sub(1)));
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aes.pc_num.write(|w| w.bits((len as u32).wrapping_sub(1)));
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// Turn on engine
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aes.en.write(|w|
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@ -103,21 +89,16 @@ pub fn run(
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aes.aad_data.write(|w| w.bits(read4pad(aad, i * 4)));
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}
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// Send and receive plaintext/ciphertext
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let mut iptr = 0;
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let mut optr = 0;
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while optr < ind.len() {
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while iptr < ind.len() && aes.data_in_flag.read().data_in_flag() == DATA_IN_FLAG_A::CAN_INPUT {
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aes.text_data.write(|w| w.bits(read4pad(ind, iptr)));
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iptr += 4;
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}
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while aes.data_out_flag.read().data_out_flag() == DATA_OUT_FLAG_A::CAN_OUTPUT {
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write4pad(outd, optr, aes.out_data.read().bits());
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optr += 4;
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}
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}
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}
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}
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if cipher_mode == cipher_mode::GCM && tag.len() != 0 {
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fn finish(
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aes: &mut pac::AES,
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cipher_mode: cipher_mode,
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tag: &mut [u8],
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) {
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unsafe {
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if cipher_mode == cipher_mode::GCM {
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// Read and store tag, if requested
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// TODO: the engine also supports writing a tag through gcm_in_tag
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// and verifying it, presumably in linear time.
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@ -134,9 +115,11 @@ pub fn run(
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atomic::compiler_fence(Ordering::SeqCst)
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}
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for i in 0..4 {
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let val = aes.gcm_out_tag[3 - i].read().bits();
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tag[i*4..i*4+4].copy_from_slice(&val.to_be_bytes());
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if tag.len() != 0 {
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for i in 0..4 {
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let val = aes.gcm_out_tag[3 - i].read().bits();
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tag[i*4..i*4+4].copy_from_slice(&val.to_be_bytes());
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}
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}
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}
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@ -146,3 +129,48 @@ pub fn run(
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}
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}
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}
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/** AES operation (encrypt or decrypt) using hardware engine. Takes a &mut
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* AES as only one operation can be active at a time.
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*
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* Supported modes:
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*
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* Mode Keybits Extra input Extra output
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* ---- --------------- ------------------------ ----------------
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* ECB 128 / 192 / 256 no IV
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* CBC 128 / 192 / 256 128 bit IV
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* GCM 128 / 192 / 256 96 bit IV + ? bytes AAD) 128 bit tag (optional)
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*/
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pub fn run(
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aes: &mut pac::AES,
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cipher_mode: cipher_mode,
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encrypt_sel: encrypt_sel,
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key: &[u8],
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iv: &[u8],
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aad: &[u8],
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ind: &[u8],
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outd: &mut [u8],
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tag: &mut [u8],
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)
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{
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setup(aes, cipher_mode, encrypt_sel, key, iv, aad, ind.len());
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unsafe {
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// Send and receive plaintext/ciphertext
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let mut iptr = 0;
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let mut optr = 0;
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while optr < ind.len() {
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while iptr < ind.len() && aes.data_in_flag.read().data_in_flag() == DATA_IN_FLAG_A::CAN_INPUT {
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aes.text_data.write(|w| w.bits(read4pad(ind, iptr)));
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iptr += 4;
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}
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while aes.data_out_flag.read().data_out_flag() == DATA_OUT_FLAG_A::CAN_OUTPUT {
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write4pad(outd, optr, aes.out_data.read().bits());
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optr += 4;
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}
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}
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}
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finish(aes, cipher_mode, tag);
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}
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