mirror of
https://github.com/laanwj/k210-sdk-stuff.git
synced 2024-11-22 01:16:20 +04:00
initial commit
This commit is contained in:
Wladimir J. van der Laan
commit
ce5b01c139
31
README.md
Normal file
31
README.md
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@ -0,0 +1,31 @@
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Maix Go / K210 stuff
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=====================
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First, get the Kendryte C toolchain and copy or symlink the contents of the
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`src/` folder to a checkout of `https://github.com/sipeed/LicheeDan_K210_examples.git`.
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Then to build a certain project do:
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```bash
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mkdir build && cd build
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cmake .. -DPROJ=<ProjectName> -DTOOLCHAIN=/opt/riscv-toolchain/bin && make
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```
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You will get 2 files, `build/<ProjectName>` and `build/<ProjectName>.bin`. The former
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is an ELF executable, the latter a raw binary that can be flashed or written to
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0x80000000 in SRAM and directly executed.
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Projects
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=========
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glyph_mapping
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-------------
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Variation of the `DVP` sample that processes the camera input through a simple
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DOS 8×8 font glyph-mapping algorithm and shows it on the display.
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dump_otp
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--------
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Dumps the contents of the OTP (One-Time Programmable memory) of the K210 CPU to
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serial output in Intel HEX format.
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15
src/dump_otp/README.md
Normal file
15
src/dump_otp/README.md
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@ -0,0 +1,15 @@
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otp-dump
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========
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Dump the contents of OTP (One-Time Programmable memory) in hexadecimal format
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to serial.
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Output is in Intel HEX format. Make sure your parser ignores non-':' prefixed lines
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as there can be warnings, or do
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grep "^:" /tmp/otp1.txt > /tmp/otp1.ihx
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objcopy -I ihex -O binary /tmp/otp1.ihx kendryte_otp1.dat
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Note that the OTP contains a serial number (at least 0x3d9c..0x3d9f seem to
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differ between boards) so it'd be wise to treat the output as
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privacy-sensitive.
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76
src/dump_otp/main.c
Normal file
76
src/dump_otp/main.c
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@ -0,0 +1,76 @@
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#include <stdio.h>
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#include <string.h>
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#include "sysctl.h"
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#include "sleep.h"
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#include "uarths.h"
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typedef int otp_read_func(uint32_t offset, uint8_t *dest, uint32_t size);
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static otp_read_func *otp_read_inner = (otp_read_func*)0x8800453c; /* fixed address in ROM */
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static uint8_t ih_chksum;
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void ih_start(void)
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{
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printf(":");
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ih_chksum = 0;
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}
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void ih_emit(uint8_t val)
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{
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printf("%02X", val);
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ih_chksum += val;
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}
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void ih_end()
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{
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printf("%02X\n", (-ih_chksum) & 0xff);
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}
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int main(void)
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{
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uint64_t core_id = current_coreid();
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if (core_id == 0)
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{
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int rv;
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sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
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sysctl_pll_set_freq(SYSCTL_PLL1, 300000000UL);
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sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
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uarths_init();
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/* system start, sleep a bit to allow UART clients to connect */
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usleep(100000);
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/* output in Intel HEX */
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uint8_t buf[32];
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for(uint32_t base=0; base<16384; base+=sizeof(buf)) {
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memset(buf, 0, sizeof(buf));
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rv = otp_read_inner(base, buf, sizeof(buf));
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if (rv != 0) {
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printf("warning: non-zero status %d while reading %08x..%08x\n", rv, base, (uint32_t)(base + sizeof(buf) - 1));
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}
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ih_start();
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ih_emit(sizeof(buf));
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ih_emit(base >> 8);
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ih_emit(base);
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ih_emit(0); /* Data */
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for (uint32_t x=0; x<sizeof(buf); ++x) {
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ih_emit(buf[x]);
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}
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ih_end();
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}
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ih_start();
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ih_emit(0);
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ih_emit(0);
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ih_emit(0);
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ih_emit(1); /* End Of File */
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ih_end();
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}
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while (1)
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asm volatile ("wfi");
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return 0;
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}
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4
src/glyph_mapping/README.md
Normal file
4
src/glyph_mapping/README.md
Normal file
@ -0,0 +1,4 @@
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glyph_mapping
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==============
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Display the real-time image from ov5640 passed through a glyph-mapping algorithm.
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19
src/glyph_mapping/board_config.h
Normal file
19
src/glyph_mapping/board_config.h
Normal file
@ -0,0 +1,19 @@
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#ifndef _BOARD_CONFIG_
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#define _BOARD_CONFIG_
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#define OV5640 0
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#define OV2640 1
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#define BOARD_KD233 0
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#define BOARD_LICHEEDAN 1
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#define BOARD_K61 0
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#if (OV5640 && OV2640) || (!OV5640 && !OV2640)
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#error ov sensor only choose one
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#endif
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#if (BOARD_LICHEEDAN && BOARD_KD233) || (BOARD_LICHEEDAN && BOARD_K61) || (BOARD_K61 && BOARD_KD233) || (!BOARD_LICHEEDAN && !BOARD_KD233 && !BOARD_K61)
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#error board only choose one
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#endif
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#endif
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261
src/glyph_mapping/cp437_8x8.h
Normal file
261
src/glyph_mapping/cp437_8x8.h
Normal file
@ -0,0 +1,261 @@
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uint8_t font[256][8] = {
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{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
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{ 0x7e, 0x81, 0xa5, 0x81, 0xbd, 0x99, 0x81, 0x7e },
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{ 0x7e, 0xff, 0xdb, 0xff, 0xc3, 0xe7, 0xff, 0x7e },
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||||
{ 0x36, 0x7f, 0x7f, 0x7f, 0x3e, 0x1c, 0x08, 0x00 },
|
||||
{ 0x08, 0x1c, 0x3e, 0x7f, 0x3e, 0x1c, 0x08, 0x00 },
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{ 0x1c, 0x3e, 0x1c, 0x7f, 0x7f, 0x6b, 0x08, 0x1c },
|
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{ 0x08, 0x1c, 0x3e, 0x7f, 0x7f, 0x2a, 0x08, 0x1c },
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||||
{ 0x00, 0x00, 0x18, 0x3c, 0x3c, 0x18, 0x00, 0x00 },
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{ 0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff },
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||||
{ 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00 },
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{ 0xff, 0xc3, 0x99, 0xbd, 0xbd, 0x99, 0xc3, 0xff },
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||||
{ 0xf0, 0xe0, 0xf0, 0xbe, 0x33, 0x33, 0x33, 0x1e },
|
||||
{ 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18 },
|
||||
{ 0x7c, 0x6c, 0x7c, 0x0c, 0x0c, 0x0e, 0x0f, 0x07 },
|
||||
{ 0x7e, 0x66, 0x7e, 0x66, 0x66, 0x76, 0x37, 0x03 },
|
||||
{ 0x18, 0xdb, 0xff, 0x3c, 0xff, 0xdb, 0x18, 0x00 },
|
||||
{ 0x00, 0x06, 0x1e, 0x7e, 0x7e, 0x1e, 0x06, 0x00 },
|
||||
{ 0x00, 0x60, 0x78, 0x7e, 0x7e, 0x78, 0x60, 0x00 },
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||||
{ 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x7e, 0x3c, 0x18 },
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||||
{ 0x36, 0x36, 0x36, 0x36, 0x36, 0x00, 0x36, 0x00 },
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||||
{ 0xfe, 0xdb, 0xdb, 0xde, 0xd8, 0xd8, 0xd8, 0x00 },
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||||
{ 0x7c, 0x86, 0x3c, 0x66, 0x66, 0x3c, 0x61, 0x3e },
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||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x7e, 0x00 },
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||||
{ 0x18, 0x3c, 0x7e, 0x18, 0x7e, 0x3c, 0x18, 0xff },
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{ 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x00 },
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{ 0x00, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00 },
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{ 0x00, 0x10, 0x30, 0x7e, 0x7e, 0x30, 0x10, 0x00 },
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{ 0x00, 0x08, 0x0c, 0x7e, 0x7e, 0x0c, 0x08, 0x00 },
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{ 0x00, 0x00, 0x00, 0x06, 0x06, 0x7e, 0x00, 0x00 },
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{ 0x00, 0x24, 0x66, 0xff, 0xff, 0x66, 0x24, 0x00 },
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{ 0x00, 0x18, 0x18, 0x3c, 0x3c, 0x7e, 0x7e, 0x00 },
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{ 0x00, 0x7e, 0x7e, 0x3c, 0x3c, 0x18, 0x18, 0x00 },
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{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
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{ 0x18, 0x3c, 0x3c, 0x18, 0x18, 0x00, 0x18, 0x00 },
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{ 0x36, 0x36, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00 },
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{ 0x36, 0x36, 0x7f, 0x36, 0x7f, 0x36, 0x36, 0x00 },
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{ 0x18, 0x7c, 0x06, 0x3c, 0x60, 0x3e, 0x18, 0x00 },
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{ 0x00, 0x63, 0x33, 0x18, 0x0c, 0x66, 0x63, 0x00 },
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||||
{ 0x1c, 0x36, 0x1c, 0x6e, 0x3b, 0x33, 0x6e, 0x00 },
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||||
{ 0x18, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00 },
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||||
{ 0x18, 0x0c, 0x06, 0x06, 0x06, 0x0c, 0x18, 0x00 },
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||||
{ 0x06, 0x0c, 0x18, 0x18, 0x18, 0x0c, 0x06, 0x00 },
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{ 0x00, 0x36, 0x1c, 0x7f, 0x1c, 0x36, 0x00, 0x00 },
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||||
{ 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00 },
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||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x0c },
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||||
{ 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00 },
|
||||
{ 0x60, 0x70, 0x38, 0x1c, 0x0e, 0x07, 0x03, 0x00 },
|
||||
{ 0x3c, 0x66, 0x76, 0x7e, 0x6e, 0x66, 0x3c, 0x00 },
|
||||
{ 0x18, 0x1e, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x00 },
|
||||
{ 0x3c, 0x66, 0x60, 0x38, 0x0c, 0x66, 0x7e, 0x00 },
|
||||
{ 0x3c, 0x66, 0x60, 0x38, 0x60, 0x66, 0x3c, 0x00 },
|
||||
{ 0x38, 0x3c, 0x36, 0x33, 0x7f, 0x30, 0x30, 0x00 },
|
||||
{ 0x7e, 0x06, 0x3e, 0x60, 0x60, 0x66, 0x3c, 0x00 },
|
||||
{ 0x38, 0x0c, 0x06, 0x3e, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x7e, 0x66, 0x60, 0x30, 0x18, 0x0c, 0x0c, 0x00 },
|
||||
{ 0x3c, 0x66, 0x66, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x3c, 0x66, 0x66, 0x7c, 0x60, 0x30, 0x1c, 0x00 },
|
||||
{ 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00 },
|
||||
{ 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x0c },
|
||||
{ 0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00 },
|
||||
{ 0x00, 0x00, 0x7e, 0x00, 0x7e, 0x00, 0x00, 0x00 },
|
||||
{ 0x06, 0x0c, 0x18, 0x30, 0x18, 0x0c, 0x06, 0x00 },
|
||||
{ 0x3c, 0x66, 0x60, 0x30, 0x18, 0x00, 0x18, 0x00 },
|
||||
{ 0x3c, 0x66, 0x76, 0x76, 0x76, 0x06, 0x3c, 0x00 },
|
||||
{ 0x18, 0x3c, 0x66, 0x66, 0x7e, 0x66, 0x66, 0x00 },
|
||||
{ 0x3f, 0x66, 0x66, 0x3e, 0x66, 0x66, 0x3f, 0x00 },
|
||||
{ 0x3c, 0x66, 0x03, 0x03, 0x03, 0x66, 0x3c, 0x00 },
|
||||
{ 0x3f, 0x36, 0x66, 0x66, 0x66, 0x36, 0x3f, 0x00 },
|
||||
{ 0x7f, 0x46, 0x16, 0x1e, 0x16, 0x46, 0x7f, 0x00 },
|
||||
{ 0x7f, 0x46, 0x16, 0x1e, 0x16, 0x06, 0x0f, 0x00 },
|
||||
{ 0x3c, 0x66, 0x03, 0x03, 0x73, 0x66, 0x7c, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0x7e, 0x66, 0x66, 0x66, 0x00 },
|
||||
{ 0x3c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x78, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1e, 0x00 },
|
||||
{ 0x67, 0x66, 0x36, 0x1e, 0x36, 0x66, 0x67, 0x00 },
|
||||
{ 0x0f, 0x06, 0x06, 0x06, 0x46, 0x66, 0x7f, 0x00 },
|
||||
{ 0x63, 0x77, 0x7f, 0x6b, 0x63, 0x63, 0x63, 0x00 },
|
||||
{ 0x63, 0x67, 0x6f, 0x7b, 0x73, 0x63, 0x63, 0x00 },
|
||||
{ 0x1c, 0x36, 0x63, 0x63, 0x63, 0x36, 0x1c, 0x00 },
|
||||
{ 0x3f, 0x66, 0x66, 0x3e, 0x06, 0x06, 0x0f, 0x00 },
|
||||
{ 0x3c, 0x66, 0x66, 0x66, 0x76, 0x3c, 0x70, 0x00 },
|
||||
{ 0x3f, 0x66, 0x66, 0x3e, 0x1e, 0x36, 0x67, 0x00 },
|
||||
{ 0x3c, 0x66, 0x0e, 0x38, 0x70, 0x66, 0x3c, 0x00 },
|
||||
{ 0x7e, 0x5a, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x7e, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x00 },
|
||||
{ 0x63, 0x63, 0x63, 0x6b, 0x7f, 0x77, 0x63, 0x00 },
|
||||
{ 0x63, 0x63, 0x36, 0x1c, 0x36, 0x63, 0x63, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0x3c, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x7f, 0x33, 0x19, 0x0c, 0x46, 0x63, 0x7f, 0x00 },
|
||||
{ 0x3c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3c, 0x00 },
|
||||
{ 0x03, 0x07, 0x0e, 0x1c, 0x38, 0x70, 0x60, 0x00 },
|
||||
{ 0x3c, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3c, 0x00 },
|
||||
{ 0x08, 0x1c, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e },
|
||||
{ 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x1e, 0x30, 0x3e, 0x33, 0x6e, 0x00 },
|
||||
{ 0x07, 0x06, 0x3e, 0x66, 0x66, 0x66, 0x3d, 0x00 },
|
||||
{ 0x00, 0x00, 0x3c, 0x66, 0x06, 0x66, 0x3c, 0x00 },
|
||||
{ 0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x6e, 0x00 },
|
||||
{ 0x00, 0x00, 0x3c, 0x66, 0x7e, 0x06, 0x3c, 0x00 },
|
||||
{ 0x38, 0x6c, 0x0c, 0x1e, 0x0c, 0x0c, 0x1e, 0x00 },
|
||||
{ 0x00, 0x00, 0x6e, 0x33, 0x33, 0x3e, 0x30, 0x1f },
|
||||
{ 0x07, 0x06, 0x36, 0x6e, 0x66, 0x66, 0x67, 0x00 },
|
||||
{ 0x18, 0x00, 0x1c, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x30, 0x00, 0x3c, 0x30, 0x30, 0x30, 0x36, 0x1c },
|
||||
{ 0x07, 0x06, 0x66, 0x36, 0x1e, 0x36, 0x67, 0x00 },
|
||||
{ 0x1c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x00, 0x00, 0x37, 0x7f, 0x6b, 0x63, 0x63, 0x00 },
|
||||
{ 0x00, 0x00, 0x3e, 0x66, 0x66, 0x66, 0x66, 0x00 },
|
||||
{ 0x00, 0x00, 0x1e, 0x33, 0x33, 0x33, 0x1e, 0x00 },
|
||||
{ 0x00, 0x00, 0x3b, 0x66, 0x66, 0x3e, 0x06, 0x0f },
|
||||
{ 0x00, 0x00, 0x6e, 0x33, 0x33, 0x3e, 0x30, 0x78 },
|
||||
{ 0x00, 0x00, 0x36, 0x6c, 0x6c, 0x0c, 0x1e, 0x00 },
|
||||
{ 0x00, 0x00, 0x7c, 0x06, 0x3c, 0x60, 0x3e, 0x00 },
|
||||
{ 0x08, 0x0c, 0x3e, 0x0c, 0x0c, 0x2c, 0x18, 0x00 },
|
||||
{ 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x6e, 0x00 },
|
||||
{ 0x00, 0x00, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x00 },
|
||||
{ 0x00, 0x00, 0x63, 0x63, 0x6b, 0x7f, 0x36, 0x00 },
|
||||
{ 0x00, 0x00, 0x63, 0x36, 0x1c, 0x36, 0x63, 0x00 },
|
||||
{ 0x00, 0x00, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x3e },
|
||||
{ 0x00, 0x00, 0x7e, 0x32, 0x18, 0x4c, 0x7e, 0x00 },
|
||||
{ 0x38, 0x0c, 0x0c, 0x06, 0x0c, 0x0c, 0x38, 0x00 },
|
||||
{ 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00 },
|
||||
{ 0x0e, 0x18, 0x18, 0x30, 0x18, 0x18, 0x0e, 0x00 },
|
||||
{ 0x6e, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x18, 0x3c, 0x66, 0x66, 0x7e, 0x00 },
|
||||
{ 0x1e, 0x33, 0x03, 0x03, 0x33, 0x1e, 0x0c, 0x06 },
|
||||
{ 0x00, 0x33, 0x00, 0x33, 0x33, 0x33, 0x7e, 0x00 },
|
||||
{ 0x30, 0x18, 0x3c, 0x66, 0x7e, 0x06, 0x3c, 0x00 },
|
||||
{ 0x7e, 0xc3, 0x3c, 0x60, 0x7c, 0x66, 0xfc, 0x00 },
|
||||
{ 0x33, 0x00, 0x1e, 0x30, 0x3e, 0x33, 0x7e, 0x00 },
|
||||
{ 0x06, 0x0c, 0x1e, 0x30, 0x3e, 0x33, 0x7e, 0x00 },
|
||||
{ 0x3c, 0x66, 0x3c, 0x60, 0x7c, 0x66, 0xfc, 0x00 },
|
||||
{ 0x00, 0x3c, 0x66, 0x06, 0x66, 0x3c, 0x18, 0x0c },
|
||||
{ 0x7e, 0xc3, 0x3c, 0x66, 0x7e, 0x06, 0x3c, 0x00 },
|
||||
{ 0x66, 0x00, 0x3c, 0x66, 0x7e, 0x06, 0x3c, 0x00 },
|
||||
{ 0x0c, 0x18, 0x3c, 0x66, 0x7e, 0x06, 0x3c, 0x00 },
|
||||
{ 0x66, 0x00, 0x1c, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x3e, 0x63, 0x1c, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x0c, 0x18, 0x1c, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x66, 0x18, 0x3c, 0x66, 0x66, 0x7e, 0x66, 0x00 },
|
||||
{ 0x18, 0x24, 0x18, 0x3c, 0x66, 0x7e, 0x66, 0x00 },
|
||||
{ 0x18, 0x0c, 0x3f, 0x06, 0x1e, 0x06, 0x3f, 0x00 },
|
||||
{ 0x00, 0x00, 0x7e, 0x30, 0x7e, 0x33, 0x7e, 0x00 },
|
||||
{ 0x7c, 0x36, 0x33, 0x7f, 0x33, 0x33, 0x73, 0x00 },
|
||||
{ 0x3c, 0x66, 0x00, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x00, 0x66, 0x00, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x0c, 0x18, 0x00, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x1e, 0x33, 0x00, 0x33, 0x33, 0x33, 0x7e, 0x00 },
|
||||
{ 0x06, 0x0c, 0x00, 0x33, 0x33, 0x33, 0x7e, 0x00 },
|
||||
{ 0x00, 0x66, 0x00, 0x66, 0x66, 0x7e, 0x60, 0x3e },
|
||||
{ 0x63, 0x00, 0x3e, 0x63, 0x63, 0x63, 0x3e, 0x00 },
|
||||
{ 0x66, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x18, 0x18, 0x7e, 0x03, 0x03, 0x7e, 0x18, 0x18 },
|
||||
{ 0x1c, 0x36, 0x26, 0x0f, 0x06, 0x67, 0x3f, 0x00 },
|
||||
{ 0x66, 0x66, 0x3c, 0x7e, 0x18, 0x7e, 0x18, 0x18 },
|
||||
{ 0x1e, 0x22, 0x22, 0x1e, 0x32, 0x1a, 0x72, 0x00 },
|
||||
{ 0x70, 0xd8, 0x18, 0x7e, 0x18, 0x1b, 0x0e, 0x00 },
|
||||
{ 0x18, 0x0c, 0x1e, 0x30, 0x3e, 0x33, 0x7e, 0x00 },
|
||||
{ 0x30, 0x18, 0x1c, 0x18, 0x18, 0x18, 0x3c, 0x00 },
|
||||
{ 0x60, 0x30, 0x00, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x30, 0x18, 0x00, 0x33, 0x33, 0x33, 0x7e, 0x00 },
|
||||
{ 0x6e, 0x3b, 0x00, 0x1f, 0x33, 0x33, 0x33, 0x00 },
|
||||
{ 0x6e, 0x3b, 0x00, 0x37, 0x3f, 0x3b, 0x33, 0x00 },
|
||||
{ 0x3c, 0x36, 0x36, 0x7c, 0x00, 0x7e, 0x00, 0x00 },
|
||||
{ 0x3c, 0x66, 0x66, 0x3c, 0x00, 0x7e, 0x00, 0x00 },
|
||||
{ 0x18, 0x00, 0x18, 0x0c, 0x06, 0x66, 0x3c, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x7e, 0x06, 0x06, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x7e, 0x60, 0x60, 0x00, 0x00 },
|
||||
{ 0xc3, 0x63, 0x33, 0x7b, 0xcc, 0x66, 0x33, 0xf0 },
|
||||
{ 0xc3, 0x63, 0x33, 0xdb, 0xec, 0xf6, 0xf3, 0xc0 },
|
||||
{ 0x00, 0x18, 0x00, 0x18, 0x18, 0x3c, 0x3c, 0x18 },
|
||||
{ 0x00, 0xcc, 0x66, 0x33, 0x66, 0xcc, 0x00, 0x00 },
|
||||
{ 0x00, 0x33, 0x66, 0xcc, 0x66, 0x33, 0x00, 0x00 },
|
||||
{ 0x22, 0x88, 0x22, 0x88, 0x22, 0x88, 0x22, 0x88 },
|
||||
{ 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55 },
|
||||
{ 0xbb, 0xee, 0xbb, 0xee, 0xbb, 0xee, 0xbb, 0xee },
|
||||
{ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18 },
|
||||
{ 0x18, 0x18, 0x18, 0x1f, 0x1f, 0x18, 0x18, 0x18 },
|
||||
{ 0x18, 0x1f, 0x1f, 0x18, 0x18, 0x1f, 0x1f, 0x18 },
|
||||
{ 0x66, 0x66, 0x66, 0x67, 0x67, 0x66, 0x66, 0x66 },
|
||||
{ 0x00, 0x00, 0x00, 0x7f, 0x7f, 0x66, 0x66, 0x66 },
|
||||
{ 0x00, 0x1f, 0x1f, 0x18, 0x18, 0x1f, 0x1f, 0x18 },
|
||||
{ 0x66, 0x67, 0x67, 0x60, 0x60, 0x67, 0x67, 0x66 },
|
||||
{ 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66 },
|
||||
{ 0x00, 0x7f, 0x7f, 0x60, 0x60, 0x67, 0x67, 0x66 },
|
||||
{ 0x66, 0x67, 0x67, 0x60, 0x60, 0x7f, 0x7f, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0x7f, 0x7f, 0x00, 0x00, 0x00 },
|
||||
{ 0x18, 0x1f, 0x1f, 0x18, 0x18, 0x1f, 0x1f, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x18, 0x18, 0x18 },
|
||||
{ 0x18, 0x18, 0x18, 0xf8, 0xf8, 0x00, 0x00, 0x00 },
|
||||
{ 0x18, 0x18, 0x18, 0xff, 0xff, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0xff, 0xff, 0x18, 0x18, 0x18 },
|
||||
{ 0x18, 0x18, 0x18, 0xf8, 0xf8, 0x18, 0x18, 0x18 },
|
||||
{ 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x00 },
|
||||
{ 0x18, 0x18, 0x18, 0xff, 0xff, 0x18, 0x18, 0x18 },
|
||||
{ 0x18, 0xf8, 0xf8, 0x18, 0x18, 0xf8, 0xf8, 0x18 },
|
||||
{ 0x66, 0x66, 0x66, 0xe6, 0xe6, 0x66, 0x66, 0x66 },
|
||||
{ 0x66, 0xe6, 0xe6, 0x06, 0x06, 0xfe, 0xfe, 0x00 },
|
||||
{ 0x00, 0xfe, 0xfe, 0x06, 0x06, 0xe6, 0xe6, 0x66 },
|
||||
{ 0x66, 0xe7, 0xe7, 0x00, 0x00, 0xff, 0xff, 0x00 },
|
||||
{ 0x00, 0xff, 0xff, 0x00, 0x00, 0xe7, 0xe7, 0x66 },
|
||||
{ 0x66, 0xe6, 0xe6, 0x06, 0x06, 0xe6, 0xe6, 0x66 },
|
||||
{ 0x00, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0x00 },
|
||||
{ 0x66, 0xe7, 0xe7, 0x00, 0x00, 0xe7, 0xe7, 0x66 },
|
||||
{ 0x18, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0x00 },
|
||||
{ 0x66, 0x66, 0x66, 0xff, 0xff, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0x18 },
|
||||
{ 0x00, 0x00, 0x00, 0xff, 0xff, 0x66, 0x66, 0x66 },
|
||||
{ 0x66, 0x66, 0x66, 0xfe, 0xfe, 0x00, 0x00, 0x00 },
|
||||
{ 0x18, 0xf8, 0xf8, 0x18, 0x18, 0xf8, 0xf8, 0x00 },
|
||||
{ 0x00, 0xf8, 0xf8, 0x18, 0x18, 0xf8, 0xf8, 0x18 },
|
||||
{ 0x00, 0x00, 0x00, 0xfe, 0xfe, 0x66, 0x66, 0x66 },
|
||||
{ 0x66, 0x66, 0x66, 0xff, 0xff, 0x66, 0x66, 0x66 },
|
||||
{ 0x18, 0xff, 0xff, 0x18, 0x18, 0xff, 0xff, 0x18 },
|
||||
{ 0x18, 0x18, 0x18, 0x1f, 0x1f, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0xf8, 0xf8, 0x18, 0x18, 0x18 },
|
||||
{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff },
|
||||
{ 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f },
|
||||
{ 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0 },
|
||||
{ 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x6e, 0x3b, 0x3b, 0x6e, 0x00, 0x00 },
|
||||
{ 0x00, 0x3c, 0x66, 0x3e, 0x66, 0x3e, 0x0c, 0x00 },
|
||||
{ 0x00, 0x7e, 0x66, 0x06, 0x06, 0x06, 0x00, 0x00 },
|
||||
{ 0x00, 0x7f, 0x36, 0x36, 0x36, 0x36, 0x66, 0x00 },
|
||||
{ 0x00, 0x7e, 0x46, 0x0c, 0x0c, 0x46, 0x7e, 0x00 },
|
||||
{ 0x00, 0x00, 0x7c, 0x36, 0x36, 0x36, 0x1c, 0x00 },
|
||||
{ 0x00, 0x00, 0x66, 0x66, 0x66, 0x3e, 0x06, 0x03 },
|
||||
{ 0x00, 0x00, 0x6e, 0x3b, 0x18, 0x18, 0x18, 0x00 },
|
||||
{ 0x7e, 0x18, 0x3c, 0x66, 0x3c, 0x18, 0x7e, 0x00 },
|
||||
{ 0x1c, 0x36, 0x36, 0x3e, 0x36, 0x36, 0x1c, 0x00 },
|
||||
{ 0x1c, 0x36, 0x63, 0x63, 0x36, 0x36, 0x77, 0x00 },
|
||||
{ 0x38, 0x0c, 0x18, 0x3c, 0x66, 0x66, 0x3c, 0x00 },
|
||||
{ 0x00, 0x00, 0x3e, 0x6b, 0x6b, 0x3e, 0x00, 0x00 },
|
||||
{ 0x30, 0x18, 0x3e, 0x6b, 0x6b, 0x3e, 0x06, 0x03 },
|
||||
{ 0x38, 0x0c, 0x06, 0x3e, 0x06, 0x0c, 0x38, 0x00 },
|
||||
{ 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00 },
|
||||
{ 0x00, 0x7e, 0x00, 0x7e, 0x00, 0x7e, 0x00, 0x00 },
|
||||
{ 0x0c, 0x0c, 0x3f, 0x0c, 0x0c, 0x00, 0x3f, 0x00 },
|
||||
{ 0x06, 0x0c, 0x18, 0x0c, 0x06, 0x00, 0x3f, 0x00 },
|
||||
{ 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x00, 0x3f, 0x00 },
|
||||
{ 0x00, 0x1c, 0x36, 0x36, 0x06, 0x06, 0x06, 0x06 },
|
||||
{ 0x30, 0x30, 0x30, 0x30, 0x36, 0x36, 0x1c, 0x00 },
|
||||
{ 0x18, 0x18, 0x00, 0x7e, 0x00, 0x18, 0x18, 0x00 },
|
||||
{ 0x00, 0x6e, 0x3b, 0x00, 0x6e, 0x3b, 0x00, 0x00 },
|
||||
{ 0x1c, 0x36, 0x36, 0x1c, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00 },
|
||||
{ 0x70, 0x10, 0x10, 0x12, 0x16, 0x1c, 0x18, 0x00 },
|
||||
{ 0x1e, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x1c, 0x30, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x00, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x00 },
|
||||
{ 0x00, 0x7e, 0x42, 0x42, 0x42, 0x42, 0x7e, 0x00 },
|
||||
};
|
||||
uint8_t glyph_by_fill[256] = {
|
||||
0x00, 0x20, 0xfa, 0x2e, 0xf9, 0x27, 0x2c, 0x2d, 0x5f, 0x60, 0x3a, 0x1c, 0x22, 0x3b, 0x7e, 0xa9, 0xaa, 0xfd, 0x07, 0x16, 0x3d, 0x5e, 0x7c, 0x28, 0x29, 0x2b, 0x3c, 0x3e, 0xf6, 0xf8, 0x69, 0xfb, 0x21, 0x3f, 0x7b, 0x7d, 0xa8, 0xad, 0xb0, 0xb3, 0xbf, 0xc0, 0xc4, 0xd9, 0xda, 0xe2, 0xe7, 0xf2, 0xf3, 0xfc, 0x6c, 0x74, 0x8b, 0x8d, 0xa1, 0x18, 0x19, 0x1a, 0x1b, 0x49, 0x5b, 0x5d, 0x63, 0x72, 0x73, 0x76, 0xf0, 0x2f, 0x5c, 0x6a, 0x78, 0xee, 0xf4, 0xf5, 0x09, 0x25, 0x31, 0x37, 0x61, 0x65, 0x6f, 0x7a, 0x7f, 0x94, 0x95, 0xa2, 0xae, 0xaf, 0xe0, 0xe5, 0xec, 0xf1, 0xf7, 0xff, 0x2a, 0x66, 0x6e, 0x75, 0xe6, 0x24, 0x43, 0x4a, 0x54, 0x81, 0x87, 0x8c, 0x97, 0x9e, 0xa3, 0xa7, 0xb4, 0xc1, 0xc2, 0xc3, 0xe4, 0x33, 0xa6, 0xeb, 0x10, 0x11, 0x13, 0x1e, 0x1f, 0x36, 0x39, 0x4c, 0x59, 0x70, 0x71, 0x77, 0x79, 0x80, 0x82, 0x89, 0x8a, 0x8f, 0x90, 0x91, 0x93, 0x9a, 0x9b, 0x9f, 0xe1, 0xef, 0x04, 0x32, 0x35, 0x53, 0x64, 0x67, 0x6d, 0x84, 0x85, 0x98, 0xa0, 0x34, 0x46, 0x47, 0x4f, 0x56, 0x6b, 0x96, 0x99, 0xb7, 0xb8, 0xbd, 0xbe, 0xd3, 0xd4, 0xd5, 0xd6, 0x50, 0x58, 0x62, 0x68, 0x9c, 0xa4, 0xe3, 0xe9, 0x0d, 0x12, 0x1d, 0x38, 0x41, 0x51, 0x8e, 0xb5, 0xc5, 0xc6, 0xd0, 0xd2, 0xe8, 0xed, 0x26, 0x40, 0x86, 0xea, 0x06, 0x0c, 0x45, 0x48, 0x4b, 0x55, 0x5a, 0x88, 0x9d, 0xa5, 0x83, 0x01, 0x15, 0x30, 0x44, 0x52, 0xb1, 0xb9, 0xba, 0xbb, 0xbc, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xdc, 0xdd, 0xde, 0xdf, 0x0b, 0x42, 0x92, 0x03, 0x05, 0x17, 0x23, 0x4d, 0x4e, 0x57, 0xab, 0xb6, 0xc7, 0xcf, 0xd1, 0x0e, 0x0f, 0xfe, 0x14, 0xac, 0xd7, 0xd8, 0x0a, 0xb2, 0x02, 0x08, 0xdb,
|
||||
};
|
||||
BIN
src/glyph_mapping/dvp_ov.bin
Normal file
BIN
src/glyph_mapping/dvp_ov.bin
Normal file
Binary file not shown.
138
src/glyph_mapping/lcd.c
Normal file
138
src/glyph_mapping/lcd.c
Normal file
@ -0,0 +1,138 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <string.h>
|
||||
#include <unistd.h>
|
||||
#include "lcd.h"
|
||||
#include "nt35310.h"
|
||||
#include "board_config.h"
|
||||
|
||||
static lcd_ctl_t lcd_ctl;
|
||||
|
||||
void lcd_polling_enable(void)
|
||||
{
|
||||
lcd_ctl.mode = 0;
|
||||
}
|
||||
|
||||
void lcd_interrupt_enable(void)
|
||||
{
|
||||
lcd_ctl.mode = 1;
|
||||
}
|
||||
|
||||
void lcd_init(void)
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
tft_hard_init();
|
||||
/*soft reset*/
|
||||
tft_write_command(SOFTWARE_RESET);
|
||||
usleep(100000);
|
||||
/*exit sleep*/
|
||||
tft_write_command(SLEEP_OFF);
|
||||
usleep(100000);
|
||||
/*pixel format*/
|
||||
tft_write_command(PIXEL_FORMAT_SET);
|
||||
data = 0x55;
|
||||
tft_write_byte(&data, 1);
|
||||
lcd_set_direction(DIR_XY_LRUD);
|
||||
|
||||
/*display on*/
|
||||
tft_write_command(DISPLAY_ON);
|
||||
lcd_polling_enable();
|
||||
}
|
||||
|
||||
void lcd_set_direction(lcd_dir_t dir)
|
||||
{
|
||||
#if BOARD_LICHEEDAN
|
||||
#else
|
||||
dir |= 0x08;
|
||||
#endif
|
||||
lcd_ctl.dir = dir;
|
||||
if (dir & DIR_XY_MASK)
|
||||
{
|
||||
lcd_ctl.width = LCD_Y_MAX - 1;
|
||||
lcd_ctl.height = LCD_X_MAX - 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
lcd_ctl.width = LCD_X_MAX - 1;
|
||||
lcd_ctl.height = LCD_Y_MAX - 1;
|
||||
}
|
||||
|
||||
tft_write_command(MEMORY_ACCESS_CTL);
|
||||
tft_write_byte((uint8_t *)&dir, 1);
|
||||
}
|
||||
|
||||
void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
|
||||
{
|
||||
uint8_t data[4] = {0};
|
||||
|
||||
data[0] = (uint8_t)(x1 >> 8);
|
||||
data[1] = (uint8_t)(x1);
|
||||
data[2] = (uint8_t)(x2 >> 8);
|
||||
data[3] = (uint8_t)(x2);
|
||||
tft_write_command(HORIZONTAL_ADDRESS_SET);
|
||||
tft_write_byte(data, 4);
|
||||
|
||||
data[0] = (uint8_t)(y1 >> 8);
|
||||
data[1] = (uint8_t)(y1);
|
||||
data[2] = (uint8_t)(y2 >> 8);
|
||||
data[3] = (uint8_t)(y2);
|
||||
tft_write_command(VERTICAL_ADDRESS_SET);
|
||||
tft_write_byte(data, 4);
|
||||
|
||||
tft_write_command(MEMORY_WRITE);
|
||||
}
|
||||
|
||||
void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color)
|
||||
{
|
||||
lcd_set_area(x, y, x, y);
|
||||
tft_write_half(&color, 1);
|
||||
}
|
||||
|
||||
void lcd_clear(uint16_t color)
|
||||
{
|
||||
uint32_t data = ((uint32_t)color << 16) | (uint32_t)color;
|
||||
|
||||
lcd_set_area(0, 0, lcd_ctl.width, lcd_ctl.height);
|
||||
tft_fill_data(&data, LCD_X_MAX * LCD_Y_MAX / 2);
|
||||
}
|
||||
|
||||
void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color)
|
||||
{
|
||||
uint32_t data_buf[640] = {0};
|
||||
uint32_t *p = data_buf;
|
||||
uint32_t data = color;
|
||||
uint32_t index = 0;
|
||||
|
||||
data = (data << 16) | data;
|
||||
for (index = 0; index < 160 * width; index++)
|
||||
*p++ = data;
|
||||
|
||||
lcd_set_area(x1, y1, x2, y1 + width - 1);
|
||||
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x1, y2 - width + 1, x2, y2);
|
||||
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x1, y1, x1 + width - 1, y2);
|
||||
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x2 - width + 1, y1, x2, y2);
|
||||
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
|
||||
}
|
||||
|
||||
void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr)
|
||||
{
|
||||
lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
tft_write_word(ptr, width * height / 2, lcd_ctl.mode ? 2 : 0);
|
||||
}
|
||||
|
||||
81
src/glyph_mapping/lcd.h
Normal file
81
src/glyph_mapping/lcd.h
Normal file
@ -0,0 +1,81 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _LCD_H_
|
||||
#define _LCD_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* clang-format off */
|
||||
#define LCD_X_MAX (240)
|
||||
#define LCD_Y_MAX (320)
|
||||
|
||||
#define BLACK 0x0000
|
||||
#define NAVY 0x000F
|
||||
#define DARKGREEN 0x03E0
|
||||
#define DARKCYAN 0x03EF
|
||||
#define MAROON 0x7800
|
||||
#define PURPLE 0x780F
|
||||
#define OLIVE 0x7BE0
|
||||
#define LIGHTGREY 0xC618
|
||||
#define DARKGREY 0x7BEF
|
||||
#define BLUE 0x001F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define YELLOW 0xFFE0
|
||||
#define WHITE 0xFFFF
|
||||
#define ORANGE 0xFD20
|
||||
#define GREENYELLOW 0xAFE5
|
||||
#define PINK 0xF81F
|
||||
#define USER_COLOR 0xAA55
|
||||
/* clang-format on */
|
||||
|
||||
typedef enum _lcd_dir
|
||||
{
|
||||
DIR_XY_RLUD = 0x00,
|
||||
DIR_YX_RLUD = 0x20,
|
||||
DIR_XY_LRUD = 0x40,
|
||||
DIR_YX_LRUD = 0x60,
|
||||
DIR_XY_RLDU = 0x80,
|
||||
DIR_YX_RLDU = 0xA0,
|
||||
DIR_XY_LRDU = 0xC0,
|
||||
DIR_YX_LRDU = 0xE0,
|
||||
DIR_XY_MASK = 0x20,
|
||||
DIR_MASK = 0xE0,
|
||||
} lcd_dir_t;
|
||||
|
||||
typedef struct _lcd_ctl
|
||||
{
|
||||
uint8_t mode;
|
||||
uint8_t dir;
|
||||
uint16_t width;
|
||||
uint16_t height;
|
||||
} lcd_ctl_t;
|
||||
|
||||
void lcd_polling_enable(void);
|
||||
void lcd_interrupt_enable(void);
|
||||
void lcd_init(void);
|
||||
void lcd_clear(uint16_t color);
|
||||
void lcd_set_direction(lcd_dir_t dir);
|
||||
void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
|
||||
void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color);
|
||||
void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color);
|
||||
void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr);
|
||||
void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color);
|
||||
void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color);
|
||||
|
||||
#endif
|
||||
|
||||
378
src/glyph_mapping/main.c
Normal file
378
src/glyph_mapping/main.c
Normal file
@ -0,0 +1,378 @@
|
||||
/* Copyright 2019 W.J. van der Laan, based on original DVP sample
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "dvp.h"
|
||||
#include "fpioa.h"
|
||||
#include "lcd.h"
|
||||
#include "ov5640.h"
|
||||
#include "ov2640.h"
|
||||
#include "plic.h"
|
||||
#include "sysctl.h"
|
||||
#include "uarths.h"
|
||||
#include "nt35310.h"
|
||||
#include "board_config.h"
|
||||
#include "cp437_8x8.h"
|
||||
#include "gpiohs.h"
|
||||
#include "sleep.h"
|
||||
|
||||
#define PIN_KEY0 16
|
||||
#define PIN_KEY1 15
|
||||
#define PIN_KEY2 17
|
||||
#define GPIO_KEY 4
|
||||
|
||||
#define DISP_WIDTH 320
|
||||
#define DISP_HEIGHT 240
|
||||
|
||||
uint32_t g_lcd_gram0[38400] __attribute__((aligned(64)));
|
||||
uint32_t g_lcd_gram1[38400] __attribute__((aligned(64)));
|
||||
|
||||
volatile uint8_t g_dvp_finish_flag;
|
||||
volatile uint8_t g_ram_mux;
|
||||
volatile int key_flag = 0;
|
||||
volatile int key_state = 1;
|
||||
|
||||
uint16_t inbuf[DISP_WIDTH*DISP_HEIGHT];
|
||||
uint16_t outbuf[DISP_WIDTH*DISP_HEIGHT];
|
||||
|
||||
static int on_irq_dvp(void *ctx)
|
||||
{
|
||||
if (dvp_get_interrupt(DVP_STS_FRAME_FINISH))
|
||||
{
|
||||
/* switch gram */
|
||||
dvp_set_display_addr(g_ram_mux ? (uint32_t)g_lcd_gram0 : (uint32_t)g_lcd_gram1);
|
||||
|
||||
// dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
|
||||
dvp_clear_interrupt(DVP_STS_FRAME_START | DVP_STS_FRAME_FINISH);
|
||||
g_dvp_finish_flag = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_dvp_finish_flag == 0)
|
||||
dvp_start_convert();
|
||||
dvp_clear_interrupt(DVP_STS_FRAME_START);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dvp_pclk io47
|
||||
* dvp_xclk io46
|
||||
* dvp_hsync io45
|
||||
* dvp_pwdn io44
|
||||
* dvp_vsync io43
|
||||
* dvp_rst io42
|
||||
* dvp_scl io41
|
||||
* dvp_sda io40
|
||||
* */
|
||||
|
||||
/**
|
||||
* lcd_cs 36
|
||||
* lcd_rst 37
|
||||
* lcd_dc 38
|
||||
* lcd_wr 39
|
||||
* */
|
||||
|
||||
static void io_mux_init(void)
|
||||
{
|
||||
|
||||
#if BOARD_LICHEEDAN
|
||||
/* Init DVP IO map and function settings */
|
||||
fpioa_set_function(42, FUNC_CMOS_RST);
|
||||
fpioa_set_function(44, FUNC_CMOS_PWDN);
|
||||
fpioa_set_function(46, FUNC_CMOS_XCLK);
|
||||
fpioa_set_function(43, FUNC_CMOS_VSYNC);
|
||||
fpioa_set_function(45, FUNC_CMOS_HREF);
|
||||
fpioa_set_function(47, FUNC_CMOS_PCLK);
|
||||
fpioa_set_function(41, FUNC_SCCB_SCLK);
|
||||
fpioa_set_function(40, FUNC_SCCB_SDA);
|
||||
|
||||
/* Init SPI IO map and function settings */
|
||||
fpioa_set_function(37, FUNC_GPIOHS0 + RST_GPIONUM);
|
||||
fpioa_set_function(38, FUNC_GPIOHS0 + DCX_GPIONUM);
|
||||
fpioa_set_function(36, FUNC_SPI0_SS3);
|
||||
fpioa_set_function(39, FUNC_SPI0_SCLK);
|
||||
|
||||
sysctl_set_spi0_dvp_data(1);
|
||||
#else
|
||||
/* Init DVP IO map and function settings */
|
||||
fpioa_set_function(11, FUNC_CMOS_RST);
|
||||
fpioa_set_function(13, FUNC_CMOS_PWDN);
|
||||
fpioa_set_function(14, FUNC_CMOS_XCLK);
|
||||
fpioa_set_function(12, FUNC_CMOS_VSYNC);
|
||||
fpioa_set_function(17, FUNC_CMOS_HREF);
|
||||
fpioa_set_function(15, FUNC_CMOS_PCLK);
|
||||
fpioa_set_function(10, FUNC_SCCB_SCLK);
|
||||
fpioa_set_function(9, FUNC_SCCB_SDA);
|
||||
|
||||
/* Init SPI IO map and function settings */
|
||||
fpioa_set_function(8, FUNC_GPIOHS0 + DCX_GPIONUM);
|
||||
fpioa_set_function(6, FUNC_SPI0_SS3);
|
||||
fpioa_set_function(7, FUNC_SPI0_SCLK);
|
||||
|
||||
sysctl_set_spi0_dvp_data(1);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
static void io_set_power(void)
|
||||
{
|
||||
#if BOARD_LICHEEDAN
|
||||
/* Set dvp and spi pin to 1.8V */
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
|
||||
#else
|
||||
/* Set dvp and spi pin to 1.8V */
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* helper functions */
|
||||
static inline uint8_t r_from_rgb565(uint16_t iv)
|
||||
{
|
||||
return ((iv >> 11) & 0x1f) << 3;
|
||||
}
|
||||
static inline uint8_t g_from_rgb565(uint16_t iv)
|
||||
{
|
||||
return ((iv >> 5) & 0x3f) << 2;
|
||||
}
|
||||
static inline uint8_t b_from_rgb565(uint16_t iv)
|
||||
{
|
||||
return ((iv >> 0) & 0x1f) << 3;
|
||||
}
|
||||
static inline uint16_t rgb565(uint8_t r, uint8_t g, uint8_t b)
|
||||
{
|
||||
return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
|
||||
}
|
||||
|
||||
/**
|
||||
* 2D convolution filter (box filter currently, would be more efficient with
|
||||
* 2-pass but we want to compute some positions only)
|
||||
*/
|
||||
uint16_t filter(int32_t bx, int32_t by, int32_t ksize)
|
||||
{
|
||||
uint32_t r = 0;
|
||||
uint32_t g = 0;
|
||||
uint32_t b = 0;
|
||||
uint32_t n = 0;
|
||||
int32_t c = ksize/2;
|
||||
for (int32_t iy=0; iy<ksize; ++iy) {
|
||||
for (int32_t ix=0; ix<ksize; ++ix) {
|
||||
int32_t y = by + iy - c;
|
||||
int32_t x = bx + ix - c;
|
||||
if (x >= 0 && y >= 0 && x < DISP_WIDTH && y < DISP_HEIGHT) {
|
||||
uint16_t iv = inbuf[y*DISP_WIDTH + x];
|
||||
r += r_from_rgb565(iv);
|
||||
g += g_from_rgb565(iv);
|
||||
b += b_from_rgb565(iv);
|
||||
n += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (n) {
|
||||
r /= n;
|
||||
g /= n;
|
||||
b /= n;
|
||||
}
|
||||
return rgb565(r, g, b);
|
||||
}
|
||||
|
||||
void irq_gpiohs2(void *gp)
|
||||
{
|
||||
key_flag = 1;
|
||||
key_state = gpiohs_get_pin(GPIO_KEY);
|
||||
return;
|
||||
}
|
||||
|
||||
static const uint32_t MODE_CNT = 3;
|
||||
int main(void)
|
||||
{
|
||||
uint64_t core_id = current_coreid();
|
||||
|
||||
if (core_id == 0)
|
||||
{
|
||||
/* Set CPU and dvp clk */
|
||||
sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL1, 300000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
|
||||
|
||||
uarths_init();
|
||||
io_mux_init();
|
||||
io_set_power();
|
||||
plic_init();
|
||||
|
||||
/* LCD init */
|
||||
printf("LCD init\n");
|
||||
lcd_init();
|
||||
#if BOARD_LICHEEDAN
|
||||
#if OV5640
|
||||
lcd_set_direction(DIR_YX_RLUD);
|
||||
#else
|
||||
lcd_set_direction(DIR_YX_RLDU);
|
||||
#endif
|
||||
#else
|
||||
#if OV5640
|
||||
lcd_set_direction(DIR_YX_LRUD);
|
||||
#else
|
||||
lcd_set_direction(DIR_YX_LRDU);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
lcd_clear(BLACK);
|
||||
|
||||
/* KEY init */
|
||||
fpioa_set_function(PIN_KEY0, FUNC_GPIOHS0 + GPIO_KEY);
|
||||
gpiohs_set_drive_mode(GPIO_KEY, GPIO_DM_INPUT);
|
||||
gpiohs_set_pin_edge(GPIO_KEY, GPIO_PE_BOTH);
|
||||
gpiohs_set_irq(GPIO_KEY, 1, irq_gpiohs2);
|
||||
|
||||
/* DVP init */
|
||||
printf("DVP init\n");
|
||||
#if OV5640
|
||||
dvp_init(16);
|
||||
dvp_enable_burst();
|
||||
dvp_set_output_enable(0, 1);
|
||||
dvp_set_output_enable(1, 1);
|
||||
dvp_set_image_format(DVP_CFG_RGB_FORMAT);
|
||||
dvp_set_image_size(320, 240);
|
||||
ov5640_init();
|
||||
#else
|
||||
dvp_init(8);
|
||||
dvp_set_xclk_rate(24000000);
|
||||
dvp_enable_burst();
|
||||
dvp_set_output_enable(0, 1);
|
||||
dvp_set_output_enable(1, 1);
|
||||
dvp_set_image_format(DVP_CFG_RGB_FORMAT);
|
||||
dvp_set_image_size(320, 240);
|
||||
ov2640_init();
|
||||
#endif
|
||||
|
||||
dvp_set_ai_addr((uint32_t)0x40600000, (uint32_t)0x40612C00, (uint32_t)0x40625800);
|
||||
dvp_set_display_addr((uint32_t)g_lcd_gram0);
|
||||
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 0);
|
||||
dvp_disable_auto();
|
||||
|
||||
/* DVP interrupt config */
|
||||
printf("DVP interrupt config\r\n");
|
||||
plic_set_priority(IRQN_DVP_INTERRUPT, 1);
|
||||
plic_irq_register(IRQN_DVP_INTERRUPT, on_irq_dvp, NULL);
|
||||
plic_irq_enable(IRQN_DVP_INTERRUPT);
|
||||
|
||||
/* enable global interrupt */
|
||||
sysctl_enable_irq();
|
||||
|
||||
/* system start */
|
||||
printf("system start\r\n");
|
||||
g_ram_mux = 0;
|
||||
g_dvp_finish_flag = 0;
|
||||
dvp_clear_interrupt(DVP_STS_FRAME_START | DVP_STS_FRAME_FINISH);
|
||||
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 1);
|
||||
|
||||
uint32_t mode = 0;
|
||||
while (1)
|
||||
{
|
||||
/* ai cal finish*/
|
||||
while (g_dvp_finish_flag == 0)
|
||||
asm volatile ("wfi");
|
||||
g_dvp_finish_flag = 0;
|
||||
|
||||
g_ram_mux ^= 0x01;
|
||||
|
||||
/* word-swap input from camera */
|
||||
uint32_t *buf_32 = g_ram_mux ? g_lcd_gram0 : g_lcd_gram1;
|
||||
for (size_t x=0; x<DISP_WIDTH*DISP_HEIGHT/2; ++x) {
|
||||
uint32_t val = buf_32[x];
|
||||
inbuf[x*2+0] = val >> 16;
|
||||
inbuf[x*2+1] = val & 0xffff;
|
||||
}
|
||||
|
||||
for (uint32_t cell_y=0; cell_y<30; ++cell_y) {
|
||||
for (uint32_t cell_x=0; cell_x<40; ++cell_x) {
|
||||
uint32_t by = cell_y * 8;
|
||||
uint32_t bx = cell_x * 8;
|
||||
|
||||
/* get average value */
|
||||
uint32_t r = 0;
|
||||
uint32_t g = 0;
|
||||
uint32_t b = 0;
|
||||
for (uint32_t iy=0; iy<8; ++iy) {
|
||||
for (uint32_t ix=0; ix<8; ++ix) {
|
||||
uint16_t iv = inbuf[(by + iy)*DISP_WIDTH + (bx + ix)];
|
||||
r += r_from_rgb565(iv);
|
||||
g += g_from_rgb565(iv);
|
||||
b += b_from_rgb565(iv);
|
||||
}
|
||||
}
|
||||
r /= 64;
|
||||
g /= 64;
|
||||
b /= 64;
|
||||
uint16_t iv = rgb565(r, g, b);
|
||||
uint8_t intensity = (r + g + b)/3;
|
||||
|
||||
uint8_t ch = glyph_by_fill[intensity];
|
||||
const uint8_t *chdata = font[ch];
|
||||
|
||||
for (uint32_t iy=0; iy<8; ++iy) {
|
||||
for (uint32_t ix=0; ix<8; ++ix) {
|
||||
uint32_t y = by + iy;
|
||||
uint32_t x = bx + ix;
|
||||
uint16_t ov;
|
||||
if (chdata[iy] & (1<<ix)) {
|
||||
switch (mode) {
|
||||
case 0: ov = iv; break;
|
||||
case 1: ov = filter(x, y, 5); break;
|
||||
case 2: ov = PURPLE; break;
|
||||
default: ov = 0;
|
||||
}
|
||||
} else {
|
||||
ov = 0;
|
||||
}
|
||||
outbuf[y*DISP_WIDTH + x] = ov;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* word-swap output to display */
|
||||
for (size_t x=0; x<DISP_WIDTH*DISP_HEIGHT/2; ++x) {
|
||||
buf_32[x] = (outbuf[x*2+0] << 16) | outbuf[x*2+1];
|
||||
}
|
||||
|
||||
lcd_draw_picture(0, 0, DISP_WIDTH, DISP_HEIGHT, buf_32);
|
||||
|
||||
if (key_flag)
|
||||
{
|
||||
if (key_state == 0)
|
||||
{
|
||||
msleep(20);
|
||||
key_flag = 0;
|
||||
mode = (mode + 1) % MODE_CNT;
|
||||
printf("mode: %d\n", mode);
|
||||
}
|
||||
else
|
||||
{
|
||||
msleep(20);
|
||||
key_flag = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
while (1)
|
||||
asm volatile ("wfi");
|
||||
|
||||
return 0;
|
||||
}
|
||||
105
src/glyph_mapping/nt35310.c
Normal file
105
src/glyph_mapping/nt35310.c
Normal file
@ -0,0 +1,105 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "nt35310.h"
|
||||
#include "gpiohs.h"
|
||||
#include "spi.h"
|
||||
#include "board_config.h"
|
||||
|
||||
static void init_dcx(void)
|
||||
{
|
||||
gpiohs_set_drive_mode(DCX_GPIONUM, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
static void set_dcx_control(void)
|
||||
{
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
static void set_dcx_data(void)
|
||||
{
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
static void init_rst(void)
|
||||
{
|
||||
gpiohs_set_drive_mode(RST_GPIONUM, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(RST_GPIONUM, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
static void set_rst(uint8_t val)
|
||||
{
|
||||
gpiohs_set_pin(RST_GPIONUM, val);
|
||||
}
|
||||
|
||||
void tft_hard_init(void)
|
||||
{
|
||||
init_dcx();
|
||||
init_rst();
|
||||
set_rst(0);
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
#if BOARD_LICHEEDAN
|
||||
spi_set_clk_rate(SPI_CHANNEL, 20000000);
|
||||
#else
|
||||
spi_set_clk_rate(SPI_CHANNEL, 25000000);
|
||||
#endif
|
||||
set_rst(1);
|
||||
}
|
||||
|
||||
void tft_write_command(uint8_t cmd)
|
||||
{
|
||||
set_dcx_control();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, (uint8_t *)(&cmd), 1, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
void tft_write_byte(uint8_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 0 /*instrction length*/, 8 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
void tft_write_half(uint16_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 0 /*instrction length*/, 16 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_SHORT);
|
||||
}
|
||||
|
||||
void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
|
||||
spi_init_non_standard(SPI_CHANNEL, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_INT);
|
||||
}
|
||||
|
||||
void tft_fill_data(uint32_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_fill_data_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length);
|
||||
}
|
||||
113
src/glyph_mapping/nt35310.h
Normal file
113
src/glyph_mapping/nt35310.h
Normal file
@ -0,0 +1,113 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _NT35310_H_
|
||||
#define _NT35310_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* clang-format off */
|
||||
#define NO_OPERATION 0x00
|
||||
#define SOFTWARE_RESET 0x01
|
||||
#define READ_ID 0x04
|
||||
#define READ_STATUS 0x09
|
||||
#define READ_POWER_MODE 0x0A
|
||||
#define READ_MADCTL 0x0B
|
||||
#define READ_PIXEL_FORMAT 0x0C
|
||||
#define READ_IMAGE_FORMAT 0x0D
|
||||
#define READ_SIGNAL_MODE 0x0E
|
||||
#define READ_SELT_DIAG_RESULT 0x0F
|
||||
#define SLEEP_ON 0x10
|
||||
#define SLEEP_OFF 0x11
|
||||
#define PARTIAL_DISPLAY_ON 0x12
|
||||
#define NORMAL_DISPLAY_ON 0x13
|
||||
#define INVERSION_DISPLAY_OFF 0x20
|
||||
#define INVERSION_DISPLAY_ON 0x21
|
||||
#define GAMMA_SET 0x26
|
||||
#define DISPLAY_OFF 0x28
|
||||
#define DISPLAY_ON 0x29
|
||||
#define HORIZONTAL_ADDRESS_SET 0x2A
|
||||
#define VERTICAL_ADDRESS_SET 0x2B
|
||||
#define MEMORY_WRITE 0x2C
|
||||
#define COLOR_SET 0x2D
|
||||
#define MEMORY_READ 0x2E
|
||||
#define PARTIAL_AREA 0x30
|
||||
#define VERTICAL_SCROLL_DEFINE 0x33
|
||||
#define TEAR_EFFECT_LINE_OFF 0x34
|
||||
#define TEAR_EFFECT_LINE_ON 0x35
|
||||
#define MEMORY_ACCESS_CTL 0x36
|
||||
#define VERTICAL_SCROLL_S_ADD 0x37
|
||||
#define IDLE_MODE_OFF 0x38
|
||||
#define IDLE_MODE_ON 0x39
|
||||
#define PIXEL_FORMAT_SET 0x3A
|
||||
#define WRITE_MEMORY_CONTINUE 0x3C
|
||||
#define READ_MEMORY_CONTINUE 0x3E
|
||||
#define SET_TEAR_SCANLINE 0x44
|
||||
#define GET_SCANLINE 0x45
|
||||
#define WRITE_BRIGHTNESS 0x51
|
||||
#define READ_BRIGHTNESS 0x52
|
||||
#define WRITE_CTRL_DISPLAY 0x53
|
||||
#define READ_CTRL_DISPLAY 0x54
|
||||
#define WRITE_BRIGHTNESS_CTL 0x55
|
||||
#define READ_BRIGHTNESS_CTL 0x56
|
||||
#define WRITE_MIN_BRIGHTNESS 0x5E
|
||||
#define READ_MIN_BRIGHTNESS 0x5F
|
||||
#define READ_ID1 0xDA
|
||||
#define READ_ID2 0xDB
|
||||
#define READ_ID3 0xDC
|
||||
#define RGB_IF_SIGNAL_CTL 0xB0
|
||||
#define NORMAL_FRAME_CTL 0xB1
|
||||
#define IDLE_FRAME_CTL 0xB2
|
||||
#define PARTIAL_FRAME_CTL 0xB3
|
||||
#define INVERSION_CTL 0xB4
|
||||
#define BLANK_PORCH_CTL 0xB5
|
||||
#define DISPLAY_FUNCTION_CTL 0xB6
|
||||
#define ENTRY_MODE_SET 0xB7
|
||||
#define BACKLIGHT_CTL1 0xB8
|
||||
#define BACKLIGHT_CTL2 0xB9
|
||||
#define BACKLIGHT_CTL3 0xBA
|
||||
#define BACKLIGHT_CTL4 0xBB
|
||||
#define BACKLIGHT_CTL5 0xBC
|
||||
#define BACKLIGHT_CTL7 0xBE
|
||||
#define BACKLIGHT_CTL8 0xBF
|
||||
#define POWER_CTL1 0xC0
|
||||
#define POWER_CTL2 0xC1
|
||||
#define VCOM_CTL1 0xC5
|
||||
#define VCOM_CTL2 0xC7
|
||||
#define NV_MEMORY_WRITE 0xD0
|
||||
#define NV_MEMORY_PROTECT_KEY 0xD1
|
||||
#define NV_MEMORY_STATUS_READ 0xD2
|
||||
#define READ_ID4 0xD3
|
||||
#define POSITIVE_GAMMA_CORRECT 0xE0
|
||||
#define NEGATIVE_GAMMA_CORRECT 0xE1
|
||||
#define DIGITAL_GAMMA_CTL1 0xE2
|
||||
#define DIGITAL_GAMMA_CTL2 0xE3
|
||||
#define INTERFACE_CTL 0xF6
|
||||
|
||||
#define DCX_GPIONUM (2)
|
||||
#define RST_GPIONUM (3)
|
||||
|
||||
|
||||
#define SPI_CHANNEL 0
|
||||
#define SPI_SLAVE_SELECT 3
|
||||
/* clang-format on */
|
||||
|
||||
void tft_hard_init(void);
|
||||
void tft_write_command(uint8_t cmd);
|
||||
void tft_write_byte(uint8_t *data_buf, uint32_t length);
|
||||
void tft_write_half(uint16_t *data_buf, uint32_t length);
|
||||
void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag);
|
||||
void tft_fill_data(uint32_t *data_buf, uint32_t length);
|
||||
|
||||
#endif
|
||||
229
src/glyph_mapping/ov2640.c
Normal file
229
src/glyph_mapping/ov2640.c
Normal file
@ -0,0 +1,229 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include "ov2640.h"
|
||||
#include "dvp.h"
|
||||
#include "plic.h"
|
||||
|
||||
const uint8_t ov2640_config[][2]=
|
||||
{
|
||||
{0xff, 0x01},
|
||||
{0x12, 0x80},
|
||||
{0xff, 0x00},
|
||||
{0x2c, 0xff},
|
||||
{0x2e, 0xdf},
|
||||
{0xff, 0x01},
|
||||
{0x3c, 0x32},
|
||||
{0x11, 0x00},
|
||||
{0x09, 0x02},
|
||||
{0x04, 0x88},
|
||||
{0x13, 0xe5},
|
||||
{0x14, 0x48},
|
||||
{0x2c, 0x0c},
|
||||
{0x33, 0x78},
|
||||
{0x3a, 0x33},
|
||||
{0x3b, 0xfb},
|
||||
{0x3e, 0x00},
|
||||
{0x43, 0x11},
|
||||
{0x16, 0x10},
|
||||
{0x39, 0x92},
|
||||
{0x35, 0xda},
|
||||
{0x22, 0x1a},
|
||||
{0x37, 0xc3},
|
||||
{0x23, 0x00},
|
||||
{0x34, 0xc0},
|
||||
{0x36, 0x1a},
|
||||
{0x06, 0x88},
|
||||
{0x07, 0xc0},
|
||||
{0x0d, 0x87},
|
||||
{0x0e, 0x41},
|
||||
{0x4c, 0x00},
|
||||
{0x48, 0x00},
|
||||
{0x5b, 0x00},
|
||||
{0x42, 0x03},
|
||||
{0x4a, 0x81},
|
||||
{0x21, 0x99},
|
||||
{0x24, 0x40},
|
||||
{0x25, 0x38},
|
||||
{0x26, 0x82},
|
||||
{0x5c, 0x00},
|
||||
{0x63, 0x00},
|
||||
{0x46, 0x22},
|
||||
{0x0c, 0x3c},
|
||||
{0x61, 0x70},
|
||||
{0x62, 0x80},
|
||||
{0x7c, 0x05},
|
||||
{0x20, 0x80},
|
||||
{0x28, 0x30},
|
||||
{0x6c, 0x00},
|
||||
{0x6d, 0x80},
|
||||
{0x6e, 0x00},
|
||||
{0x70, 0x02},
|
||||
{0x71, 0x94},
|
||||
{0x73, 0xc1},
|
||||
{0x3d, 0x34},
|
||||
{0x5a, 0x57},
|
||||
{0x12, 0x40},
|
||||
{0x17, 0x11},
|
||||
{0x18, 0x43},
|
||||
{0x19, 0x00},
|
||||
{0x1a, 0x4b},
|
||||
{0x32, 0x09},
|
||||
{0x37, 0xc0},
|
||||
{0x4f, 0xca},
|
||||
{0x50, 0xa8},
|
||||
{0x5a, 0x23},
|
||||
{0x6d, 0x00},
|
||||
{0x3d, 0x38},
|
||||
{0xff, 0x00},
|
||||
{0xe5, 0x7f},
|
||||
{0xf9, 0xc0},
|
||||
{0x41, 0x24},
|
||||
{0xe0, 0x14},
|
||||
{0x76, 0xff},
|
||||
{0x33, 0xa0},
|
||||
{0x42, 0x20},
|
||||
{0x43, 0x18},
|
||||
{0x4c, 0x00},
|
||||
{0x87, 0xd5},
|
||||
{0x88, 0x3f},
|
||||
{0xd7, 0x03},
|
||||
{0xd9, 0x10},
|
||||
{0xd3, 0x82},
|
||||
{0xc8, 0x08},
|
||||
{0xc9, 0x80},
|
||||
{0x7c, 0x00},
|
||||
{0x7d, 0x00},
|
||||
{0x7c, 0x03},
|
||||
{0x7d, 0x48},
|
||||
{0x7d, 0x48},
|
||||
{0x7c, 0x08},
|
||||
{0x7d, 0x20},
|
||||
{0x7d, 0x10},
|
||||
{0x7d, 0x0e},
|
||||
{0x90, 0x00},
|
||||
{0x91, 0x0e},
|
||||
{0x91, 0x1a},
|
||||
{0x91, 0x31},
|
||||
{0x91, 0x5a},
|
||||
{0x91, 0x69},
|
||||
{0x91, 0x75},
|
||||
{0x91, 0x7e},
|
||||
{0x91, 0x88},
|
||||
{0x91, 0x8f},
|
||||
{0x91, 0x96},
|
||||
{0x91, 0xa3},
|
||||
{0x91, 0xaf},
|
||||
{0x91, 0xc4},
|
||||
{0x91, 0xd7},
|
||||
{0x91, 0xe8},
|
||||
{0x91, 0x20},
|
||||
{0x92, 0x00},
|
||||
{0x93, 0x06},
|
||||
{0x93, 0xe3},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x04},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x96, 0x00},
|
||||
{0x97, 0x08},
|
||||
{0x97, 0x19},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x0c},
|
||||
{0x97, 0x24},
|
||||
{0x97, 0x30},
|
||||
{0x97, 0x28},
|
||||
{0x97, 0x26},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x98},
|
||||
{0x97, 0x80},
|
||||
{0x97, 0x00},
|
||||
{0x97, 0x00},
|
||||
{0xc3, 0xed},
|
||||
{0xa4, 0x00},
|
||||
{0xa8, 0x00},
|
||||
{0xc5, 0x11},
|
||||
{0xc6, 0x51},
|
||||
{0xbf, 0x80},
|
||||
{0xc7, 0x10},
|
||||
{0xb6, 0x66},
|
||||
{0xb8, 0xa5},
|
||||
{0xb7, 0x64},
|
||||
{0xb9, 0x7c},
|
||||
{0xb3, 0xaf},
|
||||
{0xb4, 0x97},
|
||||
{0xb5, 0xff},
|
||||
{0xb0, 0xc5},
|
||||
{0xb1, 0x94},
|
||||
{0xb2, 0x0f},
|
||||
{0xc4, 0x5c},
|
||||
{0xc0, 0x64},
|
||||
{0xc1, 0x4b},
|
||||
{0x8c, 0x00},
|
||||
{0x86, 0x3d},
|
||||
{0x50, 0x00},
|
||||
{0x51, 0xc8},
|
||||
{0x52, 0x96},
|
||||
{0x53, 0x00},
|
||||
{0x54, 0x00},
|
||||
{0x55, 0x00},
|
||||
{0x5a, 0xc8},
|
||||
{0x5b, 0x96},
|
||||
{0x5c, 0x00},
|
||||
{0xd3, 0x02},
|
||||
{0xc3, 0xed},
|
||||
{0x7f, 0x00},
|
||||
{0xda, 0x08},
|
||||
{0xe5, 0x1f},
|
||||
{0xe1, 0x67},
|
||||
{0xe0, 0x00},
|
||||
{0xdd, 0x7f},
|
||||
{0x05, 0x00},
|
||||
{0xff, 0x00},
|
||||
{0xe0, 0x04},
|
||||
{0x5a, 0x50},
|
||||
{0x5b, 0x3c},
|
||||
{0x5c, 0x00},
|
||||
{0xe0, 0x00},
|
||||
{0x00, 0x00}
|
||||
};
|
||||
|
||||
int ov2640_init(void)
|
||||
{
|
||||
uint16_t v_manuf_id;
|
||||
uint16_t v_device_id;
|
||||
ov2640_read_id(&v_manuf_id, &v_device_id);
|
||||
printf("manuf_id:0x%04x,device_id:0x%04x\n", v_manuf_id, v_device_id);
|
||||
uint16_t index = 0;
|
||||
for (index = 0; ov2640_config[index][0]; index++)
|
||||
dvp_sccb_send_data(OV2640_ADDR, ov2640_config[index][0], ov2640_config[index][1]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ov2640_read_id(uint16_t *manuf_id, uint16_t *device_id)
|
||||
{
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0xFF, 0x01);
|
||||
*manuf_id = (dvp_sccb_receive_data(OV2640_ADDR, 0x1C) << 8) | dvp_sccb_receive_data(OV2640_ADDR, 0x1D);
|
||||
*device_id = (dvp_sccb_receive_data(OV2640_ADDR, 0x0A) << 8) | dvp_sccb_receive_data(OV2640_ADDR, 0x0B);
|
||||
return 0;
|
||||
}
|
||||
|
||||
26
src/glyph_mapping/ov2640.h
Normal file
26
src/glyph_mapping/ov2640.h
Normal file
@ -0,0 +1,26 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _OV2640_H
|
||||
#define _OV2640_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define OV2640_ADDR 0x60
|
||||
|
||||
int ov2640_init(void);
|
||||
int ov2640_read_id(uint16_t *manuf_id, uint16_t *device_id);
|
||||
|
||||
#endif /* _OV2640_H */
|
||||
|
||||
78
src/glyph_mapping/ov5640.c
Normal file
78
src/glyph_mapping/ov5640.c
Normal file
@ -0,0 +1,78 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
#include "ov5640.h"
|
||||
#include "ov5640cfg.h"
|
||||
#include "dvp.h"
|
||||
|
||||
static void hal_delay(uint32_t delay)
|
||||
{
|
||||
usleep(delay * 1000);
|
||||
}
|
||||
|
||||
static void ov5640_wr_reg(uint16_t reg,uint8_t data)
|
||||
{
|
||||
dvp_sccb_send_data(OV5640_ADDR, reg, data);
|
||||
}
|
||||
|
||||
static uint8_t ov5640_rd_reg(uint16_t reg)
|
||||
{
|
||||
return dvp_sccb_receive_data(OV5640_ADDR, reg);
|
||||
}
|
||||
|
||||
uint8_t ov5640_init(void)
|
||||
{
|
||||
uint16_t i = 0;
|
||||
uint16_t reg = 0;
|
||||
|
||||
reg = ov5640_rd_reg(OV5640_CHIPIDH);
|
||||
reg <<= 8;
|
||||
reg |= ov5640_rd_reg(OV5640_CHIPIDL);
|
||||
printf("ID: %X \r\n", reg);
|
||||
if(reg != OV5640_ID)
|
||||
{
|
||||
printf("ID: %d \r\n", reg);
|
||||
return 1;
|
||||
}
|
||||
|
||||
ov5640_wr_reg(0x3103,0X11); /*system clock from pad, bit[1]*/
|
||||
ov5640_wr_reg(0X3008,0X82);
|
||||
hal_delay(10);
|
||||
|
||||
for(i = 0; i<sizeof(ov5640_init_reg_tbl) / 4; i++)
|
||||
{
|
||||
ov5640_wr_reg(ov5640_init_reg_tbl[i][0], ov5640_init_reg_tbl[i][1]);
|
||||
}
|
||||
|
||||
hal_delay(50);
|
||||
/* Test for flash light*/
|
||||
ov5640_flash_lamp(1);
|
||||
hal_delay(50);
|
||||
ov5640_flash_lamp(0);
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
void ov5640_flash_lamp(uint8_t sw)
|
||||
{
|
||||
ov5640_wr_reg(0x3016, 0X02);
|
||||
ov5640_wr_reg(0x301C, 0X02);
|
||||
if(sw)
|
||||
ov5640_wr_reg(0X3019, 0X02);
|
||||
else
|
||||
ov5640_wr_reg(0X3019, 0X00);
|
||||
}
|
||||
|
||||
41
src/glyph_mapping/ov5640.h
Normal file
41
src/glyph_mapping/ov5640.h
Normal file
@ -0,0 +1,41 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _OV5640_H
|
||||
#define _OV5640_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define OV5640_ID 0X5640
|
||||
#define OV5640_ADDR 0X78
|
||||
#define OV5640_CHIPIDH 0X300A
|
||||
#define OV5640_CHIPIDL 0X300B
|
||||
|
||||
#define XSIZE 320
|
||||
#define YSIZE 240
|
||||
#define LCD_GRAM_ADDRESS 0x60020000
|
||||
|
||||
#define QQVGA_160_120 0
|
||||
#define QCIF_176_144 1
|
||||
#define QVGA_320_240 2
|
||||
#define WQVGA_400_240 3
|
||||
#define CIF_352_288 4
|
||||
|
||||
#define jpeg_buf_size (30*1024)
|
||||
|
||||
uint8_t ov5640_init(void);
|
||||
void ov5640_flash_lamp(uint8_t sw);
|
||||
|
||||
#endif
|
||||
|
||||
278
src/glyph_mapping/ov5640cfg.h
Normal file
278
src/glyph_mapping/ov5640cfg.h
Normal file
@ -0,0 +1,278 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _OV5640CFG_H
|
||||
#define _OV5640CFG_H
|
||||
|
||||
#include "ov5640.h"
|
||||
|
||||
const uint16_t ov5640_init_reg_tbl[][2]=
|
||||
{
|
||||
// 24MHz input clock, 24MHz PCLK
|
||||
{0x3008, 0x42}, // software power down, bit[6]
|
||||
{0x3103, 0x03}, // system clock from PLL, bit[1]
|
||||
{0x3017, 0xff}, // FREX, Vsync, HREF, PCLK, D[9:6] output enable
|
||||
{0x3018, 0xff}, // D[5:0], GPIO[1:0] output enable
|
||||
{0x3034, 0x1a}, // MIPI 10-bit
|
||||
{0x3035, 0x41},//0x41, // PLL
|
||||
{0x3036, 0x40}, // PLL
|
||||
{0x3037, 0x13},//0x13, // PLL root divider, bit[4], PLL pre-divider, bit[3:0]
|
||||
{0x3108, 0x01}, // PCLK root divider, bit[5:4], SCLK2x root divider, bit[3:2], SCLK root divider, bit[1:0]
|
||||
{0x3630, 0x36},
|
||||
{0x3631, 0x0e},
|
||||
{0x3632, 0xe2},
|
||||
{0x3633, 0x12},
|
||||
{0x3621, 0xe0},
|
||||
{0x3704, 0xa0},
|
||||
{0x3703, 0x5a},
|
||||
{0x3715, 0x78},
|
||||
{0x3717, 0x01},
|
||||
{0x370b, 0x60},
|
||||
{0x3705, 0x1a},
|
||||
{0x3905, 0x02},
|
||||
{0x3906, 0x10},
|
||||
{0x3901, 0x0a},
|
||||
{0x3731, 0x12},
|
||||
{0x3600, 0x08}, // VCM control
|
||||
{0x3601, 0x33}, // VCM control
|
||||
{0x302d, 0x60}, // system control
|
||||
{0x3620, 0x52},
|
||||
{0x371b, 0x20},
|
||||
{0x471c, 0x50},
|
||||
{0x3a13, 0x43}, // pre-gain = 1.047x
|
||||
{0x3a18, 0x00}, // gain ceiling
|
||||
{0x3a19, 0xf8}, // gain ceiling = 15.5x
|
||||
{0x3635, 0x13},
|
||||
{0x3636, 0x03},
|
||||
{0x3634, 0x40},
|
||||
{0x3622, 0x01},
|
||||
{0x3c01, 0x34}, // Band auto, bit[7]
|
||||
{0x3c04, 0x28}, // threshold low sum
|
||||
{0x3c05, 0x98}, // threshold high sum
|
||||
{0x3c06, 0x00}, // light meter 1 threshold[15:8]
|
||||
{0x3c07, 0x07}, // light meter 1 threshold[7:0]
|
||||
{0x3c08, 0x00}, // light meter 2 threshold[15:8]
|
||||
{0x3c09, 0x1c}, // light meter 2 threshold[7:0]
|
||||
{0x3c0a, 0x9c}, // sample number[15:8]
|
||||
{0x3c0b, 0x40}, // sample number[7:0]
|
||||
{0x3810, 0x00}, // Timing Hoffset[11:8]
|
||||
{0x3811, 0x10}, // Timing Hoffset[7:0]
|
||||
{0x3812, 0x00}, // Timing Voffset[10:8]
|
||||
{0x3708, 0x64},
|
||||
{0x4001, 0x02}, // BLC start from line 2
|
||||
{0x4005, 0x1a}, // BLC always update
|
||||
{0x3000, 0x00}, // enable blocks
|
||||
{0x3004, 0xff}, // enable clocks
|
||||
{0x300e, 0x58}, // MIPI power down, DVP enable
|
||||
{0x302e, 0x00},
|
||||
{0x4300, 0x61},
|
||||
{0X501F, 0x01},
|
||||
{0x3820, 0x46}, // flip
|
||||
{0x3821, 0x00}, // mirror
|
||||
{0x3814, 0x71}, // timing X inc
|
||||
{0x3815, 0x35}, // timing Y inc
|
||||
{0x3800, 0x00}, // HS
|
||||
{0x3801, 0x00}, // HS
|
||||
{0x3802, 0x00}, // VS
|
||||
{0x3803, 0x00}, // VS
|
||||
{0x3804, 0x0a}, // HW (HE)
|
||||
{0x3805, 0x3f}, // HW (HE)
|
||||
{0x3806, 0x07}, // VH (VE)
|
||||
{0x3807, 0x9f}, // VH (VE)
|
||||
{0x3808, (320 >> 8)}, // DVPHO
|
||||
{0x3809, (320 & 0xff)}, // DVPHO
|
||||
{0x380a, (240 >> 8)}, // DVPVO
|
||||
{0x380b, (240 & 0xff)}, // DVPVO
|
||||
{0x380c, 0x07}, // HTS
|
||||
{0x380d, 0x58}, // HTS
|
||||
{0x380e, 0x01}, // VTS
|
||||
{0x380f, 0xf0}, // VTS
|
||||
{0x3810, 0x00}, // HTS
|
||||
{0x3811, 0x08}, // HTS
|
||||
{0x3812, 0x00}, // VTS
|
||||
{0x3813, 0x02}, // VTS
|
||||
{0x3618, 0x00},
|
||||
{0x3612, 0x29},
|
||||
{0x3709, 0x52},
|
||||
{0x370c, 0x03},
|
||||
{0x3a02, 0x02}, // 60Hz max exposure
|
||||
{0x3a03, 0xe0}, // 60Hz max exposure
|
||||
{0x3a14, 0x02}, // 50Hz max exposure
|
||||
{0x3a15, 0xe0}, // 50Hz max exposure
|
||||
{0x4004, 0x02}, // BLC line number
|
||||
{0x3002, 0x1c}, // reset JFIFO, SFIFO, JPG
|
||||
{0x3006, 0xc3}, // disable clock of JPEG2x, JPEG
|
||||
{0x4713, 0x03}, // JPEG mode 3
|
||||
{0x4407, 0x04}, // Quantization scale
|
||||
{0x460b, 0x37},
|
||||
{0x460c, 0x20},
|
||||
{0x4837, 0x16}, // MIPI global timing
|
||||
{0x3824, 0x04}, // PCLK manual divider
|
||||
{0x5001, 0xA3}, // SDE on, scale on, UV average off, color matrix on, AWB on
|
||||
{0x3503, 0x00}, // AEC/AGC on
|
||||
{0x440e, 0x00},
|
||||
{0x5000, 0xa7}, // Lenc on, raw gamma on, BPC on, WPC on, CIP on
|
||||
{0x3a0f, 0x30}, // stable range in high
|
||||
{0x3a10, 0x28}, // stable range in low
|
||||
{0x3a1b, 0x30}, // stable range out high
|
||||
{0x3a1e, 0x26}, // stable range out low
|
||||
{0x3a11, 0x60}, // fast zone high
|
||||
{0x3a1f, 0x14}, // fast zone low
|
||||
{0x5800, 0x23},
|
||||
{0x5801, 0x14},
|
||||
{0x5802, 0x0f},
|
||||
{0x5803, 0x0f},
|
||||
{0x5804, 0x12},
|
||||
{0x5805, 0x26},
|
||||
{0x5806, 0x0c},
|
||||
{0x5807, 0x08},
|
||||
{0x5808, 0x05},
|
||||
{0x5809, 0x05},
|
||||
{0x580a, 0x08},
|
||||
{0x580b, 0x0d},
|
||||
{0x580c, 0x08},
|
||||
{0x580d, 0x03},
|
||||
{0x580e, 0x00},
|
||||
{0x580f, 0x00},
|
||||
{0x5810, 0x03},
|
||||
{0x5811, 0x09},
|
||||
{0x5812, 0x07},
|
||||
{0x5813, 0x03},
|
||||
{0x5814, 0x00},
|
||||
{0x5815, 0x01},
|
||||
{0x5816, 0x03},
|
||||
{0x5817, 0x08},
|
||||
{0x5818, 0x0d},
|
||||
{0x5819, 0x08},
|
||||
{0x581a, 0x05},
|
||||
{0x581b, 0x06},
|
||||
{0x581c, 0x08},
|
||||
{0x581d, 0x0e},
|
||||
{0x581e, 0x29},
|
||||
{0x581f, 0x17},
|
||||
{0x5820, 0x11},
|
||||
{0x5821, 0x11},
|
||||
{0x5822, 0x15},
|
||||
{0x5823, 0x28},
|
||||
{0x5824, 0x46},
|
||||
{0x5825, 0x26},
|
||||
{0x5826, 0x08},
|
||||
{0x5827, 0x26},
|
||||
{0x5828, 0x64},
|
||||
{0x5829, 0x26},
|
||||
{0x582a, 0x24},
|
||||
{0x582b, 0x22},
|
||||
{0x582c, 0x24},
|
||||
{0x582d, 0x24},
|
||||
{0x582e, 0x06},
|
||||
{0x582f, 0x22},
|
||||
{0x5830, 0x40},
|
||||
{0x5831, 0x42},
|
||||
{0x5832, 0x24},
|
||||
{0x5833, 0x26},
|
||||
{0x5834, 0x24},
|
||||
{0x5835, 0x22},
|
||||
{0x5836, 0x22},
|
||||
{0x5837, 0x26},
|
||||
{0x5838, 0x44},
|
||||
{0x5839, 0x24},
|
||||
{0x583a, 0x26},
|
||||
{0x583b, 0x28},
|
||||
{0x583c, 0x42},
|
||||
{0x583d, 0xce}, // lenc BR offset
|
||||
{0x5180, 0xff}, // AWB B block
|
||||
{0x5181, 0xf2}, // AWB control
|
||||
{0x5182, 0x00}, // [7:4] max local counter, [3:0] max fast counter
|
||||
{0x5183, 0x14}, // AWB advanced
|
||||
{0x5184, 0x25},
|
||||
{0x5185, 0x24},
|
||||
{0x5186, 0x09},
|
||||
{0x5187, 0x09},
|
||||
{0x5188, 0x09},
|
||||
{0x5189, 0x75},
|
||||
{0x518a, 0x54},
|
||||
{0x518b, 0xe0},
|
||||
{0x518c, 0xb2},
|
||||
{0x518d, 0x42},
|
||||
{0x518e, 0x3d},
|
||||
{0x518f, 0x56},
|
||||
{0x5190, 0x46},
|
||||
{0x5191, 0xf8}, // AWB top limit
|
||||
{0x5192, 0x04}, // AWB bottom limit
|
||||
{0x5193, 0x70}, // red limit
|
||||
{0x5194, 0xf0}, // green limit
|
||||
{0x5195, 0xf0}, // blue limit
|
||||
{0x5196, 0x03}, // AWB control
|
||||
{0x5197, 0x01}, // local limit
|
||||
{0x5198, 0x04},
|
||||
{0x5199, 0x12},
|
||||
{0x519a, 0x04},
|
||||
{0x519b, 0x00},
|
||||
{0x519c, 0x06},
|
||||
{0x519d, 0x82},
|
||||
{0x519e, 0x38}, // AWB control
|
||||
{0x5480, 0x01}, // Gamma bias plus on, bit[0]
|
||||
{0x5481, 0x08},
|
||||
{0x5482, 0x14},
|
||||
{0x5483, 0x28},
|
||||
{0x5484, 0x51},
|
||||
{0x5485, 0x65},
|
||||
{0x5486, 0x71},
|
||||
{0x5487, 0x7d},
|
||||
{0x5488, 0x87},
|
||||
{0x5489, 0x91},
|
||||
{0x548a, 0x9a},
|
||||
{0x548b, 0xaa},
|
||||
{0x548c, 0xb8},
|
||||
{0x548d, 0xcd},
|
||||
{0x548e, 0xdd},
|
||||
{0x548f, 0xea},
|
||||
{0x5490, 0x1d},
|
||||
{0x5381, 0x1e}, // CMX1 for Y
|
||||
{0x5382, 0x5b}, // CMX2 for Y
|
||||
{0x5383, 0x08}, // CMX3 for Y
|
||||
{0x5384, 0x0a}, // CMX4 for U
|
||||
{0x5385, 0x7e}, // CMX5 for U
|
||||
{0x5386, 0x88}, // CMX6 for U
|
||||
{0x5387, 0x7c}, // CMX7 for V
|
||||
{0x5388, 0x6c}, // CMX8 for V
|
||||
{0x5389, 0x10}, // CMX9 for V
|
||||
{0x538a, 0x01}, // sign[9]
|
||||
{0x538b, 0x98}, // sign[8:1]
|
||||
{0x5580, 0x06}, // saturation on, bit[1]
|
||||
{0x5583, 0x40},
|
||||
{0x5584, 0x10},
|
||||
{0x5589, 0x10},
|
||||
{0x558a, 0x00},
|
||||
{0x558b, 0xf8},
|
||||
{0x501d, 0x40}, // enable manual offset of contrast
|
||||
{0x5300, 0x08}, // CIP sharpen MT threshold 1
|
||||
{0x5301, 0x30}, // CIP sharpen MT threshold 2
|
||||
{0x5302, 0x10}, // CIP sharpen MT offset 1
|
||||
{0x5303, 0x00}, // CIP sharpen MT offset 2
|
||||
{0x5304, 0x08}, // CIP DNS threshold 1
|
||||
{0x5305, 0x30}, // CIP DNS threshold 2
|
||||
{0x5306, 0x08}, // CIP DNS offset 1
|
||||
{0x5307, 0x16}, // CIP DNS offset 2
|
||||
{0x5309, 0x08}, // CIP sharpen TH threshold 1
|
||||
{0x530a, 0x30}, // CIP sharpen TH threshold 2
|
||||
{0x530b, 0x04}, // CIP sharpen TH offset 1
|
||||
{0x530c, 0x06}, // CIP sharpen TH offset 2
|
||||
{0x5025, 0x00},
|
||||
{0x3008, 0x02}, // wake up from standby, bit[6]
|
||||
{0x4740, 0X21}, //VSYNC active HIGH
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user