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rust: Clean up SPI interface

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Selectively borrow types from pac, this breaks the need for a direct
dependency on pac for clients of SPI and makes the interface easier to
use.
This commit is contained in:
Wladimir J. van der Laan 2019-06-01 22:07:52 +00:00
parent 00ac503e3e
commit 9bdd98f29b
2 changed files with 42 additions and 37 deletions
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54
rust/k210-shared/src/board/lcd.rs
View File

@ -1,12 +1,8 @@
/** ST7789V LCD driver */
use k210_hal::pac;
use pac::spi0::ctrlr0;
use pac::spi0::spi_ctrlr0;
use crate::soc::gpio;
use crate::soc::gpiohs;
use crate::soc::sleep::usleep;
use crate::soc::spi::SPI;
use crate::soc::spi::{SPI,work_mode,frame_format,aitm,tmod};
pub const SPI_SLAVE_SELECT: u32 = 3;
pub const DCX_GPIONUM: u8 = 2;
@ -176,15 +172,15 @@ impl<X: SPI> LCDLL for LCD<X> {
self.set_rst(false);
self.spi.set_clk_rate(10000000);
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
8,
0,
8, /*instruction length*/
0, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.set_rst(true);
}
@ -192,15 +188,15 @@ impl<X: SPI> LCDLL for LCD<X> {
fn write_command(&self, cmd: command) {
self.set_dcx_control();
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
8,
0,
8, /*instruction length*/
0, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.spi.send_data(SPI_SLAVE_SELECT, &[cmd as u8]);
}
@ -208,15 +204,15 @@ impl<X: SPI> LCDLL for LCD<X> {
fn write_byte(&self, data_buf: &[u8]) {
self.set_dcx_data();
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
8,
0,
0, /*instruction length*/
8, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.spi.send_data(SPI_SLAVE_SELECT, data_buf);
}
@ -224,15 +220,15 @@ impl<X: SPI> LCDLL for LCD<X> {
fn write_half(&self, data_buf: &[u16]) {
self.set_dcx_data();
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
16,
0,
0, /*instruction length*/
16, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.spi.send_data(SPI_SLAVE_SELECT, data_buf);
}
@ -240,15 +236,15 @@ impl<X: SPI> LCDLL for LCD<X> {
fn write_word(&self, data_buf: &[u32]) {
self.set_dcx_data();
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
32,
0,
0, /*instruction length*/
32, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.spi.send_data(SPI_SLAVE_SELECT, data_buf);
}
@ -256,15 +252,15 @@ impl<X: SPI> LCDLL for LCD<X> {
fn fill_data(&self, data: u32, length: usize) {
self.set_dcx_data();
self.spi.configure(
ctrlr0::WORK_MODEW::MODE0,
ctrlr0::FRAME_FORMATW::OCTAL,
work_mode::MODE0,
frame_format::OCTAL,
32,
0,
0, /*instruction length*/
32, /*address length*/
0, /*wait cycles*/
spi_ctrlr0::AITMW::AS_FRAME_FORMAT,
ctrlr0::TMODW::TRANS,
aitm::AS_FRAME_FORMAT,
tmod::TRANS,
);
self.spi.fill_data(SPI_SLAVE_SELECT, data, length);
}

25
rust/k210-shared/src/soc/spi.rs
View File

@ -40,18 +40,27 @@ pub struct SPIImpl<IF> {
spi: IF,
}
/** Borrow work mode from pac */
pub use ctrlr0::WORK_MODEW as work_mode;
/** Borrow frame format from pac */
pub use ctrlr0::FRAME_FORMATW as frame_format;
/** Borrow aitm from pac */
pub use spi_ctrlr0::AITMW as aitm;
/** Borrow tmod from pac */
pub use ctrlr0::TMODW as tmod;
pub trait SPI {
fn configure(
&self,
work_mode: ctrlr0::WORK_MODEW,
frame_format: ctrlr0::FRAME_FORMATW,
work_mode: work_mode,
frame_format: frame_format,
data_bit_length: u8,
endian: u32,
instruction_length: u8,
address_length: u8,
wait_cycles: u8,
instruction_address_trans_mode: spi_ctrlr0::AITMW,
tmod: ctrlr0::TMODW,
instruction_address_trans_mode: aitm,
tmod: tmod,
);
fn set_clk_rate(&self, spi_clk: u32) -> u32;
fn send_data<X: Into<u32> + Copy>(&self, chip_select: u32, tx: &[X]);
@ -68,15 +77,15 @@ impl<IF: SPI01> SPI for SPIImpl<IF> {
/// Configure SPI transaction
fn configure(
&self,
work_mode: ctrlr0::WORK_MODEW,
frame_format: ctrlr0::FRAME_FORMATW,
work_mode: work_mode,
frame_format: frame_format,
data_bit_length: u8,
endian: u32,
instruction_length: u8,
address_length: u8,
wait_cycles: u8,
instruction_address_trans_mode: spi_ctrlr0::AITMW,
tmod: ctrlr0::TMODW,
instruction_address_trans_mode: aitm,
tmod: tmod,
) {
assert!(data_bit_length >= 4 && data_bit_length <= 32);
assert!(wait_cycles < (1 << 5));