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rust: SPI clock speed constant for LCD
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@ -15,9 +15,11 @@ use crate::soc::dmac::{DMAC,dma_channel};
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pub const SPI_CS: u32 = 3;
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pub const DCX_GPIONUM: u8 = 2;
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pub const RST_GPIONUM: u8 = 3;
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pub const LCD_X_MAX: u16 = 240;
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pub const LCD_Y_MAX: u16 = 320;
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/** SPI clock (this seems to be the highest possible value which is reliable on both my MaixGo
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* boards) */
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pub const SPI_CLK: u32 = 18_000_000;
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#[repr(u8)]
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#[derive(Copy, Clone)]
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@ -210,7 +212,7 @@ impl<X: SPI> LCDLL for LCD<'_, X> {
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self.init_dcx();
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self.init_rst();
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self.set_rst(false);
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self.spi.set_clk_rate(18000000);
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self.spi.set_clk_rate(SPI_CLK);
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self.spi.configure(
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work_mode::MODE0,
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frame_format::OCTAL,
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