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https://github.com/laanwj/k210-sdk-stuff.git
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rust: Test sha256 accelerator too
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@ -4,6 +4,7 @@
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#![no_std]
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#![no_main]
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use core::sync::atomic::{self, Ordering};
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use k210_hal::{Peripherals, pac};
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use k210_hal::prelude::*;
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use k210_hal::stdout::Stdout;
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@ -21,6 +22,9 @@ fn main() -> ! {
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// Enable clocks for AES and reset the engine
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sysctl::clock_enable(sysctl::clock::AES);
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sysctl::reset(sysctl::reset::AES);
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// Enable clocks for SHA256 and reset the engine
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sysctl::clock_enable(sysctl::clock::SHA);
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sysctl::reset(sysctl::reset::SHA);
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// Configure UART
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let serial = p
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@ -69,14 +73,14 @@ fn main() -> ! {
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// Can write up to 80 bytes (20 words) here at once before the queue is full.
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for &v in pt.iter() {
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while aes.data_in_flag.read().data_in_flag() != DATA_IN_FLAG_A::CAN_INPUT {
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continue;
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atomic::compiler_fence(Ordering::SeqCst)
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}
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aes.text_data.write(|w| w.bits(v));
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}
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for i in 0..4 {
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while aes.data_out_flag.read().data_out_flag() != DATA_OUT_FLAG_A::CAN_OUTPUT {
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continue;
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atomic::compiler_fence(Ordering::SeqCst)
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}
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ct[i] = aes.out_data.read().bits();
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//write!(stdout, "{:08x} ", val).unwrap();
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@ -87,6 +91,64 @@ fn main() -> ! {
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writeln!(stdout, "MISMATCH").unwrap();
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}
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}
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/*
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$ echo -n "abc" | sha256sum
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ba7816bf8f01cfea414140de5dae2223b00361a396177a9cb410ff61f20015ad -
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*/
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let sha_in: [u8; 64] = [
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b'a', b'b', b'c', 0x80, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, // Padding (total size in bits, big-endian)
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];
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let sha_out_ref: [u8; 32] = [
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0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea,
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0x41, 0x41, 0x40, 0xde, 0x5d, 0xae, 0x22, 0x23,
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0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17, 0x7a, 0x9c,
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0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad,
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];
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let mut sha_out = [0u8; 32];
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write!(stdout, "SHA256: ").unwrap();
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unsafe {
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use pac::sha256::function_reg_0::{ENDIAN_A};
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sha256.num_reg.write(|w|
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w.data_cnt().bits(1));
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sha256.function_reg_0.write(|w|
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w.endian().variant(ENDIAN_A::BE)
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.en().bit(true));
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sha256.function_reg_1.write(|w|
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w.dma_en().bit(false));
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for i in 0..16 {
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while sha256.function_reg_1.read().fifo_in_full().bit() {
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atomic::compiler_fence(Ordering::SeqCst)
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}
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sha256.data_in.write(|w| w.bits(
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((sha_in[i*4 + 0] as u32) << 0)
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| ((sha_in[i*4 + 1] as u32) << 8)
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| ((sha_in[i*4 + 2] as u32) << 16)
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| ((sha_in[i*4 + 3] as u32) << 24)
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));
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}
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while !sha256.function_reg_0.read().en().bit() {
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atomic::compiler_fence(Ordering::SeqCst)
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}
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for i in 0..8 {
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let val = sha256.result[7 - i].read().bits();
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sha_out[i*4 + 0] = (val >> 0) as u8;
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sha_out[i*4 + 1] = (val >> 8) as u8;
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sha_out[i*4 + 2] = (val >> 16) as u8;
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sha_out[i*4 + 3] = (val >> 24) as u8;
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}
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if sha_out == sha_out_ref {
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writeln!(stdout, "MATCH").unwrap();
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} else {
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writeln!(stdout, "MISMATCH").unwrap();
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}
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}
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loop {
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unsafe { asm::wfi(); }
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}
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