doc: Add some information about UART1/2/3

This commit is contained in:
Wladimir J. van der Laan 2020-02-16 15:11:08 +00:00
parent 5d20ac05a0
commit 0445bc55ee

View File

@ -660,11 +660,20 @@ UARTx
| 0xfc | `CTR` | Component Type Register | | 0xfc | `CTR` | Component Type Register |
This block is replicated for all 3 UART peripherals. The latter registers (0x20 This block is replicated for all 3 UART peripherals. The latter registers (0x20
and higher) are not used in the SDK, but defined in the structure. Their use is and higher) are not used in the SDK, but defined in the structure.
unknown, although the names match some other UART controllers.
It looks like this matches the "Designware" 16550 compatible UART, which has a
driver in the Linux kernel tree (`drivers/tty/serial/8250/8250_dw.c`).
The best match to the register names and offsets appears to be the UART described in The best match to the register names and offsets appears to be the UART described in
[HUGEIC Communication Interface Peripheral Users Guide](http://www.huge-ic.com/Communication%20Interface%20Peripheral%20User%27s%20Guide%20V0.1.pdf). [HUGEIC Communication Interface Peripheral Users Guide](http://www.huge-ic.com/Communication%20Interface%20Peripheral%20User%27s%20Guide%20V0.1.pdf).
```
UART1: Designware UART version 4.0.1
UART1: Features APB 32 bits THRE SIR ADDITIONAL_FEAT SHADOW UART_ADD_ENCODED_PARAMS DMA_EXTRA UART 16 bytes
UART1: CTR 44570110
```
UARTHS UARTHS
------ ------